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A critical fault detection analysis & fault time in a UPFC transmission line
Protection and Control of Modern Power Systems volume 4, Article number: 3 (2019)
This paper discusses a critical study of fault detection and fault time analysis in a Unified Power Flow Controller (UPFC) transmission line. Here the Discrete Wavelet Transform (DWT) and Discrete Fourier Transform (DFT) approach are used for processing the faulty current signal to obtain fundamental current signal. The extracted fault current signals from the current transformer are fed to DWT and DFT approach for computing spectral energy (SE). The differential spectral energy (DSE) of phase currents are evaluated by taking the difference of SE obtained at sending and receiving end. The DSE is the key factor for deciding the fault in any of the phase or not. The Daubechy mother wavelet (db4) is used here because of its high accuracy of detection with less processing time. The novelty of the scheme is that it can accurately detect the critical fault variation of the line. Number of simulations are validated at the extreme condition of the line and compared to other conventional existing scheme. Multi-phase fault in double circuit line, CT saturation, UPFC operating condition (series voltage and angle), UPFC location and wind speed variation including wind farm simulation are validated to verify the performance of the scheme. The advantages of the scheme is that it works effectively to detect the fault at any stage of critical condition of the line and fault detection time remains within 20 msec (less than one cycle period). This scheme protects both internal and external zone including parameter variation of the line.
Protection of Transmission line including flexible AC transmission system (FACTS) controller  is a major challenging task for the researchers now a days. Among all FACTs controller used in transmission line, UPFC [2, 3] is known to be utmost versatile devices. This can provide instantaneous and self-governing control of significant power system in transmission line. The UPFC consists series (SSSC) and shunt converters (STATCOM) of self-commutating nature. The most significant FACT’s device like UPFC improves the power transmission capability in addition to stability of transmission system. Some of the existing methodologies are outlined in terms of protection of transmission line. The travelling wave theory  is recommended to perform the fault detection and classification. However, the difficulty using this scheme is that of requirement of bulky hardware setup, which is costly and requires regular maintenance for tripping signal. In addition to this, the process is not easy to filter out the high frequency signal from noisy signal. Another approach of ANN and fuzzy logic are also proposed [5, 6] but this scheme fails to provide accurate results because of inaccurate phasor input data and large numbers of neurons. A heuristic approach like fuzzy logic  is also suggested. The badly-behaved of this computing approach unable to detect the fault & response time in a accurate manner because of frequency changes. Efforts are made by the researchers to identify the faulty zone and response time using Kalman filter approach . However, its accuracy is limited because of large numbers of unlike filters. Another approach of the machines intelligent method the SVM  is realistic for fault classification analysis. However, it is highly susceptible to more than 30 dB SNR  and produces the error and computational burden as compared to decision tree  (DT) approach. The above-mentioned schemes are also outlined in various works of literature w.r.t detection, classification and response time. However, the few works of literature discuss the protection of a UPFC transmission line which makes the scheme more challenging. The strong inspiration for developing an algorithm which detects fast response time to detect all shunt types fault including the variation of UPFC parameter and entire line protection.
This paper is structured into five section. The section-1 discusses the introduction, section-2 signal processing DWT and DFT algorithm, Section-3 the methodology for fault detection and response time, Section-4 simulation results and Section-5 describes the conclusion part of the paper.
Signal processing of DWT
The wavelet transform, WT [11, 12] has been used as a potent tool for transient fault analysis. It provides the number of filter banks like H.P and L.P filters, which divide input signal of frequency-band into high-frequency and low-frequency signal discussed in the Mallat’s algorithm .The performance based on variable-sized, windowing technique. More precise low-frequency information’s can be achieved using longer time intervals on the other way high-frequency information’s can be obtained by means of short interval window size. WT analysis occasionally compresses /de-noise the signal lacking significant degradation of performance. It decomposes the signal into the number of basic function set called as wavelets. Mother wavelet  can be decomposed into the various types of scaled & shifted versions to obtain prototype wavelets. Appropriate mother wavelet selection  is also a very important issue for fault signal analysis to achieve better accuracy. The most convenient and highly accurate signal processing technique utilized is the wavelet analysis. The wavelets are the families of the functions produced from a single function, known as the mother wavelet. It can be done by means of scaling and translating operations. The scaling operation is used to dilate and compress the mother wavelet to obtain the respective high and low frequency information of the function to be analyzed. Then the translation is used to obtain the time information. In this way a family of scaled and translated wavelets is created and it serves as the base for representing the function to be analysed. In the case of the dyadic transform, which can be viewed as a special kind of DWT spectral analyzer, ao = 2 and bo = 1. DWT can be implemented using a multi-stage filter with down sampling of the output of the low-pass filter. Mother wavelet like Daubechies has many filter coefficients like db4, db6, db8 and db10 etc. However, db4 mother wavelet [15, 16] is properly suitable in case of shunt fault analysis.
Modified continuous wavelet transform (CWT)
The modified CWT is expressed as,
The * denotes complex conjugate, where a0 and b0 are the modified dilation and translation parameter. The discretization step of dilation and translation are denoted as k and l. The modified parameter can be expressed as
Mother wavelet can be expressed as
Modified wavelet is expressed as
DWT coefficients can be written after discretization
Three stage wavelet decomposition tree
The faulty signals are extracted and processed using wavelet transform referred in . In this 1 kHz sampling frequency (20 samples/cycle) is considered in the 50 Hz system. The decomposition of the signal is achieved using 3 different stage of levels. In 1st level of decomposition, a1 (0–500 Hz) and d1 (500–1 kHz), in 2nd levela2 (0–250 Hz) and d2 (250 Hz–500 Hz) and in 3rda3 (0–125 Hz) and d3 (125–250 Hz). Therefore, a3 contains fundamental (50 Hz) current component. The 3rdlevel, reconstructed signal (A3) of individual phase current (A, B, C) are obtained from a3 of the concerned phases at both ends of the substation. Fundamental r.ms current signals are obtained from the reconstructed current signal using the DFT approach.
The Amplitude and phase of fundamental current are evaluated as given in (7)
Where Im and Re denotes imaginary (B) and real value (A) of fundamental current I(k). The amplitude of phase current is expressed as
Spectral Energy of phase current is expressed in (13) as
Where P is the phase current.
The DSEP is calculated from the difference of spectral energy evaluated from B-S and B-4 and it is expressed as
The protection scheme used
The studied scheme is depicted in Fig. 1. Fault points are provided at bus B-S, B3 and B-4. An UPFC of 100-MVA comprises two 48-pulse VSC, each of which is linked side to side DC capacitors of 2500 μF. In UPFC, the STATCOM is connected through a shunt transformer 15 kV/500 kV and SSSC is connected through a series transformer (15 kV/22 kV). UPFC is widely used because it is more advantageous compared to other FACT’s device. It can work in dual mode STATCOM for shunt type and SSSC for series type compared to shunt type (SVC, STATCOM) alone and series type (SSSC, TCSC). Yes it can be applied to other transmission line. The feature of the UPFC is discussed below & how exactly it operates in dual mode. As far as reliability is concerned, it is more reliable as compared to other types of FACTs device. It is always preferred to install middle of the transmission line. As you know it can actively control the voltage and frequency by compensating reactive and active power of the line uniformly. For this reason the optimal location we have considered the UPFC at the middle of the transmission line. UPFC modelling and its controller are referred from [18, 19].
The flow chart is illustrated in Fig. 2. Vs and Vr are the voltages of substation-1 & substation-2 respectively. The power angle δ (in degree) is the phase difference of Vs and Vr. The voltage, frequency and short circuit level (SCL) of sending & receiving end are equal (VS =Vr =500 kV, f = 50 Hz & SCL = 1500MVA) and δ = δs-δr, where, δs = 300 and δr = 00 are the phase angle of Vs and Vr. The UPFC compensated line is divided into four parts of impedance section i.e., Zl1, Zl2, Zl3 and Zl4 respectively. Z1 = 0.01537 + j0.2783Ὡ/km and Z0 = 0.04612 + j0.8341142Ὡ/km are the positive and zero sequence impedance. The fault detection analysis are tested using mentioned below parameter.
Fault resistance: Rf
Fault inception angle: FIA
Reversing the power flow
Source Impedance: SI
UPFC variation: series voltage & angle variation (Vse & θse)
The current signals are extracted from both ends of CT’s and fed to ADC converter. The third level approximate coefficient (a3) is computed by applying DWT and fundamental phasors are extracted by applying DFT using eq. (4). Spectral Energy [18, 20, 21] of each phase current is calculated from fundamental current magnitude using eq. (5). The DSEp (DSE of p-phase) is calculated by taking the difference of SEP obtained from both end of the line using eq. (6).Then the DSEP of each phase current is compared with the set threshold. Ten different types of symmetrical & unsymmetrical shunt fault cases are considered.
Power system network used
All the simulation studies of the test system are carried out in ‘R2014AMatlab/Simulink’ platform at 0.3 s (600th sample) at a 50 Hz system. This scheme performs based on an assumption of the extracted signal must be time synchronized through GPS. As the measurement error introduced due to latency is very less and it does not give any error in computation process [22, 23].
The following mentioned below cases gives the information of fault detection in comparison to a threshold (Th). To validate the better simulation analysis a factor ‘Kr’ is multiplied by Th to perform more accurate for fault detection. The Kr value is further decided by different shunt fault simulation of different shunt fault considering the parameter variation of the line and set as 1.2 for higher accuracy.
DSEP˃1.2Th: It indicates fault is in phase, P (50% distance from bus B-S)
DSEP˂-1.2Th: It indicates fault is in phase, P (50% distance from bus B-4)
(− 1.2Th˂ DSEP˂ 1.2Th): External fault
The setting value of Th is decided by considering the different simulation occurred under different shunt faults varying the parameter of fault resistance, fault inception angle, wind speed etc. The minimum value of Th is considered in which the different types of all the faults are identified by simulation of different Th value and the occurrence of faults taken simultaneously and the fault case/ no fault cases are analyzed. The threshold (Th = ±45) is selected for this test system (+ve sign, for fault is located within 50% distance from B-S) and (−ve sign, for fault is located 50% distance from B-4). The Th value is selected after a large number of simulations conducted.
Simulation result and discussion
MATLAB 2014A is used for UPFC modelling.
Figure 3 shows the variation of AG fault current magnitude retrieved at a distance of 100 km from bus B-S & 100 km from bus B-4 respectively.
The fault resistance (Rf) has a significant impact on the study of fault analysis. To verify its accuracy the Rf values are varied from 1 Ω to100Ω. In our test simulation, the extreme value of Rf is considered for verifying the different shunt fault analysis. If the extreme case of Rf value is performed well then the middle value of Rf performs satisfactory. Figure 4 (a) depicts A phase-G fault occurs at 1 km distance from bus B-S, Rf = 100 Ω. The DSE of only A phase is increasing in the upward direction & crosses Th = 45 and signifies A phase fault and takes fault time in 9 ms time. Similarly, Fig. 4(b) depicts ABC phase-G fault at 150 km from B-S at different Rf value 50 Ω and 100 Ω and different SI (source impedance) value such as 30% and 50% increase of NSI. In both the case the fault time takes 15 ms to detect the fault. However, the fault in Rf = 50 Ω and SI = 30% increase of NSI magnitude is higher as compared to Rf = 100 Ω and SI = 50% increase of NSI. In all the three cases in Fig. 4, it depicts that the fault time remains within 20 ms or 1 cycle period of time.
In the table presented below two fault conditions are considered. Fault Condition-1: 100 km from B-S (before UPFC). Fault Condition-2: 300 km from B-S (after UPFC). In two cases of fault condition it shows that faulty phase current has higher DSE value (more than Th) compared to other phase current. In all table, faulty DSE phase values are denoted as bold numerical which signifies the detection of faulty phase. In addition to this FC signifies the corresponding fault classification. Table 1 presents the DSE Variation at Rf = 1 Ω and 100 Ω.
The performance of fault detection & response time is considered by varying FIA value such as FIA = 00, 450 and 900. The extreme case of FIA value is tested to verify the performance of the scheme. This is the critical case of fault detection analysis. Figure 5(a) depicts A phase-G fault occurs at three different FIA values such as 00, 450 and 900 from B-S at 150 km from B-S. In all the three cases the fault is detected. However, the fault time is minimum 9 ms in FIA = 00, 10 ms in FIA = 450 and 15 ms in FIA = 900. Figure 5(b) depicts the A phase-G fault (after UPFC) at three different location such as 300 km, 350 km and 375 km from B-S and FIA from 00 to 900. In all such cases, the fault is detected and the fault time remains maximum 17 ms. Therefore it is decided that, the system is working fine.
Table 2 presents the comparison of Rf, fault location, power angle and FIA with reference to existing scheme of SE based ST  and DWT . In all such situation of parameter variation, the scheme works successfully to detect the fault.
To verify the effectiveness of the scheme further, the variation of SI (source impedance) is also taken into consideration. Therefore, it is essential to study the critical study of fault analysis of SI at different conditions (0 to 30% less/more of Normal SI). The test is validated by increasing/decreasing the SI value (0 to 30% less or more of NSI). In Fig. 6 fault in C phase-G at 150 km (before UPFC) from bus B-S. The figure depicts a comparative analysis of three different fault cases such as Normal SI (NSI) and 30% less or more of NSI. In all such cases the C phase faults are detected in same fault time 9 ms. In a similar manner. From the above case of discussion, it reveals that the fault is detected in 9 ms to detect the fault.
Reverse power flow
This is an important issue for fault analysis study. Here the phase angle of sending (δ1) and receiving end (δ2) are interchanged. To validate the simulations, the number of cases are conducted for system analysis of the scheme. Figure 7 depicts the fault B phase-G, at extreme location (1 km and 399 km from B-S). The fault location is considered for phase reversal before UPFC (1 km from B-S) and after UPFC (399 km from B-S). It clearly shows that the fault detection time is minimum 9 ms in the 1 km distance as compared to 15 ms in the 399 km distance. In both the cases, the fault time remains within 1 cycle time.
Thus it is seen that irrespective of fault location in the transmission line for both normal flow and reverse power flow, the scheme is working fine.
Effect of UPFC operating condition
The UPFC operating condition voltage magnitude (Vse) and angle (θse) are the two important parameter while considering different fault cases. The performance of the scheme is also affected in case of the change in Vse and θse. Few cases of simulation study are prepared to study the behavior of the scheme. The performance of the scheme is presented in Tables 3 and 4 respectively. Figure 8(a) shows the BC phase fault, 250 km from bus B-S at Vse = 15%. In this case, both the phase DSE increases in the downward direction to cross the Th value to detect the fault in B and C phase. Figure 8(b) depicts a comparison of B phase-G fault, 350 km from bus B-S at Vse such as 8%, 6% and 4% increase of normal Vse value in 15 ms, 18 ms and 20 ms respectively. However, it is noticed from the figure that higher the value of Vse the lesser will be the value of fault time. In a similar manner Fig. 8(c), depicts the B phase-G fault at three different values of θse such as 100, 200 and 300 respectively. It is further noticed that in such cases of variation, the fault time is required to detect the fault in 10 ms. Therefore it is concluded that the irrespective variation of Vse and θse, the scheme works fine to detect the fault in 1 cycle of time which is illustrated in Tables 4 and 5 respectively.
Effect of CT saturation
CT saturation is an important aspect for studying fault analysis. Figure 9 depicts ABC-G fault after the clearance of CT saturation. Sometimes fault occurred due to CT saturation, in this figure ABC-G fault cleared in 18 ms time and after clearance another three phase fault occurred which is detected in the figure between 700 sample to 850 sample. This fault is growing in the negative direction and increases in the positive direction and cross the threshold line in 850 sampling time. Therefore, the fault is characterized as a repeating ABC-G fault after CT saturation.
Effect of multi-phase fault
Multi-phase fault means fault occurs in three different phases at the same location of fault but different time span. Here, a special fault case in A, B and C has occurred at the 300 km distance from B-S but at different time span (Phase A fault is occurred in 0.3 s, Phase B in 0.4 s and phase C in 0.5 s in a sequence manner). The fault detection and fault time are depicted in Fig. 10. The simulation is processed in same manner one after the other for three different time span 0.3 s, 0.4 s and 0.5 s separately. However, it detects the fault in three different time such as phase A fault is detected in 10 ms, phase B fault in 12 ms and phase C fault in 14 ms respectively. Therefore the scheme works satisfactorily in case of multi-phase fault analysis.
Effect of UPFC location
The effect of three different UPFC position is also discussed for fault detection and fault time calculation. The UPFC is positioned at three different places in the 400 km transmission line such as 100 km, 200 km and 300 km from bus B-S. The Fig. 11 depicts the A phase-G fault time takes 9 ms for UPFC position at 100 km, 10 ms for UPFC position at 200 km and 14 ms at 300 km. In all such cases, the fault is detected but it takes more time when the UPFC is at 300 km. However, the preferred location of UPFC is at mid-point compensated line.
Effect of UPFC including wind farm
Effect of wind farm in a UPFC integrated line is an important factor for study of fault analysis. A comparison of different shunt fault analysis are presented in Table 6 to assess the performance indices of UPFC line with UPFC including wind farm line. It is noticed that fault analysis performance is higher in case of the performance of UPFC including wind farm. The indices here are considered as dependability, security and yield. Dependability is the rate of success operation of the relay. Security is to access the degree of incorrect operation of the relay. Yield signifies the exact prediction of fault cases.
Dependability = Σ (No. of Faults predicted)/Σ (No. of Actual fault case)
Security = Σ (No. of false faults predicted)/Σ (No. of Actual false faults)
Yield = Σ (No. of true faults predicted)/Σ (No. of Actual true faults)
In addition to the internal fault, the scheme is also tested for an external fault between line sections from bus B-3 to bus B-4 shown in the Fig. 1. The Fig. 12 depicts the ABC-G fault, the variation of DSE in three-phase fault at the extreme side of the value such as Rf = 100 Ω and SI = 30% increase in normal SI value. This reveals that in the extreme case value of Rf and SI also it detects external fault as a result of which, any one of the DSE phase current A, B & C are unable to cross the Th value (i.e, ±45) and remains within Th = ±20 at any moment of cycle period of time. This signifies the fault is an external fault case.
The critical fault detection analysis (extreme condition of variation of parameter study of fault analysis) and fault time calculations are discussed in an UPFC integrated line. Using the signal processing technique of combined approach (DWT and DFT) the fault detection and fault time of different types of phase fault are noted in the simulation figure. The fault detection and the fault time of the relay are discussed separately by varying different parameter condition in the above result section. The fault time in each of the different fault cases are presented from Table 1 to Table 5 and further compared to the existing literature [24, 25]. The most significant conclusion drawn here is that the DSE attains positive Th = 45, in case of fault before UPFC and Th = − 45, after UPFC (beyond 50% distance from UPFC). The scheme operates satisfactory under different line parameters such as Rf (1 Ω -100 Ω) which is relatively high, SI (0–30% increase of Normal SI), FIA (0–90 degree), reverse power flow, effect of UPFC operating condition, effect of CT saturation, multiphase fault and effect of UPFC location which is the extreme side parameter variation case of strong and weak system of UPFC integrated transmission line. The internal and external fault analysis are validated to perform total protection of compensated line. The Table 1 presents the performance comparisons of fault time under different variation of parameters of line and in all such cases the fault time is less than 1 cycle as compared to the existing scheme. Table 2 shows the performance comparison of fault time under different parameters in transmission line. Table 3 presents the performance of fault time by varying the operating condition of UPFC such as θse from 00 to 900 at UPFC Vse = 5% and Table 4 shows that performance of varying Vse from 0 to 10% increase of normal Vse at θse = 00. Irrespective of all the variation of UPFC operating condition, it is found that the fault time in Tables 3 and 4 remain within 1 cycle time. Table 5 presents a comparison of the proposed DSE scheme with the other existing scheme. The Differential current scheme (DCS) is the amplitude of phase current which is discussed in equation-8. It works to detect the fault but sometimes it fails to detect because of not significant magnitude of faulty phase current, which can’t be detected whereas the proposed DSE is the highest accuracy to detect the fault as seen from the eqs. 9 and 10, it is square of the amplitude phase current, and the difference of spectral energy of sending end and receiving end of the respective phase So the DSE of any phase (A, B or C) waveform is more predominant compared to DCS to detect the fault. The proposed DSE scheme is unaffected under change in SI, reverse power flow, high Rf value, multi-circuit fault and UPFC parameter variation etc. as compared to existing scheme. Table 6 presents the Comparison of proposed DSE scheme with existing scheme of UPFC including wind-farm.
A critical fault detection analysis in a UPFC compensated line is proposed. The scheme is compared including wind farm in the line. Here the two important DWT and DFT processor is used to detect the fault at any critical stage or extreme condition of line parameter variation such as fault resistance, source impedance, fault inception angle, multi-phase fault, CT saturation, UPFC operating condition (Vse & θse), UPFC location and wind speed variation including wind farm in the line. The DSE is the key factor to take the decision of the line if there is a fault in the line or not. The important point in all such critical case studies is that the fault detection time remains less than 1 cycle (20 msec). The performance indices of the line such as dependability, security and yield are also considered to verify the reliability, accuracy and performance of the compensated line. From the simulation study it is revealed that the scheme works perfectly including wind farm at different variation of wind speed. Further the scheme is also compared with DCS and DRS scheme. The performance of the line is illustrated and compared with other existing scheme in the respective table. The novelty of the scheme is that for higher detection accuracy and less processing time ‘db4’ mother wavelet is used. In addition to this the scheme protects overall protection of the line both internal and external zone of compensated transmission line.
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Mishra, S.K., Tripathy, L.N. A critical fault detection analysis & fault time in a UPFC transmission line. Prot Control Mod Power Syst 4, 3 (2019) doi:10.1186/s41601-019-0117-5
- Fault detection
- Fault time