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Fault identification scheme for protection and adaptive reclosing in a hybrid multi-terminal HVDC system

Abstract

A fault identification scheme for protection and adaptive reclosing is proposed for a hybrid multi-terminal HVDC system to increase the reliability of fault isolation and reclosing. By analyzing the "zero passing" characteristic of current at the local end during the converter capacitor discharge stage, the fault identification scheme is proposed. The distributed parameter-based fault location equation, which incorporates fault distance and fault impedance, is developed with the injection signal and the distributed parameter model during the adaptive reclosing stage. The fault distance is determined using a trust region reflection algorithm to identify the permanent fault, and a fault identification scheme for adaptive reclosing is developed. Simulation results show that the proposed scheme is suitable for long-distance transmission lines with strong anti-fault impedance and anti-interference performance. Also, it is less affected by communication delay and DC boundary strength than existing methods.

1 Introduction

Traditional high voltage direct current (HVDC) systems using a line-commutated converter (LCC) are often used owing to their large capacity and longer transmission distance advantages. Such HVDC technology progress is nonetheless constrained by commutation failure. Voltage source converters (VSC) using fully controlled power electronic switches have significant potential for development in HVDC systems owing to their higher controllability and avoidance of commutation failure [1]. However, in a practical HVDC project, if VSC is used, its cost usually restricts project development. As a result, the hybrid HVDC system, which integrates traditional LCC and VSC converters, has a wide range of applications. A hybrid HVDC system provides significant transmission capacity and longer transmission distance, eliminates the risk of commutation failure, and decreases the cost [2].

Given the advantages of a multi-terminal power network, hybrid multi-terminal HVDC systems, such as the Wudongde hybrid multi-terminal HVDC transmission system, have a wide range of application prospects as HVDC research progresses [3]. The system uses a T-shape topology comprising an LCC at the sending terminal and two hybrid modular multilevel converters (MMC) at the receiving terminals. The negative level output capability of the hybrid MMC provides fault current self-clearing [4]. Compared with the half-bridge MMC (HB-MMC), the DC boundary strength required by the hybrid MMC will be further weakened [5]. Nevertheless, because of the peculiarity of the T-shape topology, identifying the fault area based on the DC boundary is complicated.

Currently, the protection principles of the hybrid multi-terminal HVDC grid mainly focus on single-ended protection [6,7,8,9] and pilot protection [3, 10,11,12]. Generally, the single-end protection principle of the hybrid multi-terminal DC transmission system depends on wavefront identification, and its performance is closely related to the sampling rate, wavefront calibration, DC boundary, fault locations, etc., and requires further development. The pilot protection principle for the hybrid multi-terminal HVDC transmission system mainly depends on current polarity characteristics or traveling wave transmission theory. As a result, the performance is affected by fluctuations in electrical quantities, wavefront calibration, sampling rate, etc. Moreover, in the case of long-distance transmission lines, the pilot protection principle is vulnerable to transmission delay and calculation error at the two ends. Thus its performance needs to be further enhanced.

Currently, injection adaptive reclosure methods [13,14,15] are generally based on traveling wave transmission theory. However, the traveling wave transmission process can be influenced by the sampling rate, DC boundary, fault position, accuracy of wavefront identification and other parameters [15,16,17,18], and thus its performance requires further improvement. References [19, 20] use the fault analysis method to identify the fault properties of the line, but the performance analysis of the line length and fault impedance requires additional investigation.

Existing research has the following problems:

  • Most fault detection schemes rely on the DC boundary, so their effectiveness needs to be investigated further when the DC boundary weakens or vanishes.

  • Most existing fault identification schemes use traveling wave transmission theory. Nevertheless, fault impedance, sampling rate, wavefront calibration, special fault location, and other factors can affect the performance of these traditional methods, reducing protection performance.

  • Most fault identification schemes are only for protection or reclosing while ignoring fault identification schemes in the whole fault process.

Thus, this paper proposes a fault identification scheme for protection and adaptive reclosing for a hybrid multi-terminal HVDC system. The proposed scheme has the following main features:

  • In the protection stage, the "zero-passing" characteristics of the current at the local end during the capacitor discharge stage are used to quickly identify the fault area without a long communication delay and complex mathematical calculation.

  • In the adaptive reclosing stage, the proposed method can sensitively identify the fault properties and has the fault location function. In addition, it does not need to set the setting values via simulation.

  • The proposed scheme is suitable for long transmission lines during the whole fault process and has strong anti-fault impedance and anti-interference performance. In addition, it is less affected by the influence of the DC boundary and sampling rate than existing methods.

The rest of the paper is structured as follows. Section 2 analyzes the current characteristics in the capacitor discharge stage, and the "zero-passing" characteristic of the current at the local end is used to identify the fault area. In Sect. 3, a fault identification scheme for adaptive reclosing is proposed, one which considers the influence of distributed parameters and the fault branch downstream. It can identify as well as locate permanent faults. The proposed fault identification scheme flow chart for protection and adaptive reclosing is given in Sect. 4, while its performance in various fault scenarios is verified in Sect. 5. Conclusions are provided in Sect. 6.

2 Fault identification scheme for protection

The hybrid multi-terminal HVDC system is depicted in Fig. 1. An LCC rectifier is used at the sending terminal, and two hybrid MMCs used as inverters are installed at the receiving terminals. The LCC uses constant current control, whereas the two MMCs employ constant voltage and active power control. The DC fault stage is divided into capacitor discharge and a current limiting stage.

Fig. 1
figure 1

The topology of hybrid multi-terminal HVDC system

In Fig. 1, a, b, c, d are the protection installations of the positive lines, whereas a′, b′, c′, d′ are the protection installations of the negative lines. Ldc denotes the current limiting reactor.

2.1 Fault current characteristics

For the hybrid multi-terminal HVDC system, the capacitor discharge stage is dominant, during which the DC fault current rises rapidly, given as [25]:

$$\begin{gathered} i_{{{\text{dc}}}} (t) = - \frac{1}{{\sin \theta ^{\prime}_{{{\text{dc}}}} }}i_{{{{\text{dc}}}}{(0)}} e^{{ - \frac{t}{{\tau_{{{\text{dc}}}} }}}} \sin (\omega_{{{\text{dc}}}} t - \theta_{{{\text{dc}}}} ) + \frac{{u_{{{\text{dc}}}} }}{{R_{{{\text{dis}}}} }}e^{{ - \frac{t}{{\tau_{{{\text{dc}}}} }}}} \sin (\omega_{{{\text{dc}}}} t) \hfill \\ \tau_{{{\text{dc}}}} { = }\frac{{4L_{0} + 6L_{{{\text{dc}}}} }}{{2R_{0} + 3R_{{{\text{dc}}}} }} \hfill \\ \omega_{{{\text{dc}}}} = \sqrt {\frac{{2N(2L_{{{\text{arm}}}} + 3L_{{{\text{dc}}}} ) - C_{{0}} (2R_{{{\text{arm}}}} + 3L_{{{\text{dc}}}} )^{2} }}{{4C_{{0}} (2L_{{{\text{arm}}}} + 3L_{{{\text{dc}}}} )^{2} }}} \hfill \\ \theta_{{{\text{dc}}}} = \arctan (\tau_{{{\text{dc}}}} \omega_{{{\text{dc}}}} ) \hfill \\ R_{{{\text{dis}}}} = \sqrt {\frac{{2N(2L_{{{\text{arm}}}} + 3L_{{{\text{dc}}}} ) - C_{{0}} (2R_{{{\text{arm}}}} + 3L_{{{\text{dc}}}} )^{2} }}{{36C_{{0}} }}} \hfill \\ \end{gathered}$$
(1)

where Rdis, Larm, and Rarm represent the equivalent resistance of the MMC side, and the equivalent inductance and resistance of the arm, respectively. C0 is the submodule capacitance, while θdc and ωdc are the initial phase and angular frequency of the DC current, respectively. idc(0) and udc are the DC current and voltage in normal conditions.

In the case of a positive pole-to-ground (PTG) fault, the positive current direction is assigned as the bus flow direction line. Figure 2 shows a single pole example (i.e., the positive pole) where i1 and i2 are the capacitor discharge currents from protection installations at locations b and a, respectively, and i0 is the load current before the fault.

Fig. 2
figure 2

The current direction of the capacitor discharge stage

The fault current ib and ia at locations b and a can be expressed as:

$$\left\{ \begin{gathered} i_{b} { = }i_{0} + i_{1} \hfill \\ i_{a} { = }i_{0} + i_{2} \hfill \\ \end{gathered} \right.$$
(2)

Since the directions of the load current and the capacitor discharge current are opposite, the fault current will have a "zero-passing" characteristic while increasing in the opposite direction for the protection installation at terminal b. When combined with (1), protection installation a has the same current characteristics as protection installation b. The capacitor discharge stage mainly dominates the fault currents of the two terminals. The direction of fault current is initially determined by the direction of load current and then by the direction of capacitor discharge.

The fault identification scheme is constructed based on the fault current characteristics (i.e., capacitor-discharge stage and fault current limiting stage). The three fault areas T1, T2, and T3 can be used to categorize DC system faults. The faults in the T-shaped area are classified as T3 area (f3 faults), while T1 and T2 denote the faults (f1 and f2 faults) that occur on the left and right sides of T3, respectively.

Pole-to-pole (PTP) faults that occur on T1 are taken as the next example. The direction of fault current flow measured at protection installations b and a of the positive pole is shown in Fig. 3, where t0 is the time when the capacitor begins to discharge after the fault occurrence, and t1 is the start time of the fault current limiting stage.

Fig. 3
figure 3

Faults occur on T1

As shown in Fig. 3, the fault currents of protection installations b and a for the positive pole will have the "zero passing" characteristic for the T1 fault area. Similarly, for the negative line fault, the fault currents of protection installations b' and a' also have the "zero passing" characteristic.

Another example is a PTP fault that occurs on T2. Figure 4 shows the directions of fault current flow as measured at positive pole protection installations b and a. It can be seen from Fig. 4 that for the T2 fault area, the fault currents of protection installations b and a for the positive line will not have the "zero passing" characteristic. Similarly, for the negative line fault, the fault currents of protection installations b' and a' also don’t have the "zero passing" characteristic.

Fig. 4
figure 4

Faults occur on T2

The PTP fault that occurs on T3 is taken as another example to further elaborate the fault discrimination process. The directions of fault current flow measured at protection installations b and a of the positive pole are given in Fig. 5.

Fig. 5
figure 5

Faults occur on T3

It can be seen from Fig. 5 that for the T3 fault area, one fault current of protection installations b and a for the positive line satisfies the "zero passing" characteristic, whereas the other does not. The fault currents of protection installations b' and a' for the negative line fault also have the same characteristic.

2.2 The protection scheme for the fault isolation

2.2.1 Trigger criterion

The trigger criteria can be expressed as:

$$\frac{{1}}{m}\sum\limits_{k = 1}^{m} {\left| {I(k)} \right|} > I_{{{\text{set}}}} \, or\frac{{1}}{m}\sum\limits_{k = 1}^{m} {\left| {U(k)} \right|} < U_{{{\text{set}}}}$$
(3)

where |I(k)| and |U(k)| are the respective DC current and DC voltage amplitudes measured at protection installation b, a, b', a', and m = 3 are the data sampling points.

The trigger time should be earlier than the start time of the fault current limiting strategy to distinguish a fault in the stage of capacitor discharge. Moreover, the bipolar coupling effect should also be considered. Therefore, the setting Iset is set to 1.1 times the rated value and the setting Uset is set to 0.9 times the rated value.

2.2.2 Fault isolation criterion

The polarities of fault current flow measured at protection installations b and a are shown in Table 1, where "Y" indicates ‘yes’ and "N" indicates ‘no’.

Table 1 Fault current characteristics

It can be seen from Table 1 that the "zero passing" characteristic of the T1 area fault will be reflected at protection installations b and a, whereas the "zero passing" characteristic for the T2 area fault will not exist at protection installations b and a. One of the protection installations b and a shows the "zero passing" characteristic for the T3 area fault.

To fully consider the delay effect for the MMC control cycle [4], the duration of capacitor discharge [4], the rapidity requirements of fault identification for flexible DC transmission lines [3, 4], and sufficient margin, the identification time of the protection method is finally determined to be 3 ms. Its data window length covers the capacitor discharge duration, which meets the requirements of zero-passing discrimination of the protection method at the capacitor discharge stage.

The converter then transits from the capacitor discharge to the fault current limiting stage. Currently, the LCC side sets the trigger angle above 120º by forced phase shifting to achieve fault current limiting, while the MMC side realizes fault current limiting by setting the current reference value to 0 [4]. The above process is to extinguish the arc at the fault branch and eliminate the temporary fault.

When the fault occurs on T3, it is determined to be permanent, and the converter should be permanently blocked. Meanwhile, HSS isolates the fault [5]. When the fault occurs on T1 or T2, it is required to identify the fault properties further. In the case of a temporary fault, the fault will be cleared when the fault current is limited to 0, while in the case of a permanent fault, the converter needs to be blocked. Therefore, it is necessary to distinguish the permanent faults in T1 and T2 for adaptive reclosing.

3 Fault identification scheme for adaptive reclosing

A fault identification scheme for adaptive reclosing based on an active injection strategy is introduced. The injection strategy is triggered by a fixed time delay (i.e., a generally fixed time delay of 150 ms is introduced [14]) after the fault current is limited to 0 for the fault isolation. After identifying the fault area (T1 or T2), MMC2 switches from the fault current limiting strategy to the active injection signal strategy.

A grounding fault in the T1 area is taken as an example, and the equivalent circuit diagram is shown in Fig. 6. Ub and Ib are the injection voltage and current flowing through the protection installation b, respectively. Ux and Ix are the voltage and current of the fault branch (f1), respectively. Ig is the current flowing into the fault branch, Rg denotes the fault impedance of the fault branch, and Ic is the current flowing from the fault branch to the remote end.

Fig. 6
figure 6

Permanent grounding fault equivalent circuit

3.1 The limitation of the RL model

3.1.1 Permanent fault

The equivalent permanent circuit diagram with the RL model in Fig. 6 is further represented in Fig. 7, where Rx and Lx are the equivalent resistance and inductance on the right side of the fault branch. R and L are the equivalent resistance and inductance on the left side of the fault branch, respectively.

Fig. 7
figure 7

Equivalent permanent circuit with RL model

Since the fault current is limited to 0 by the fault current limiting strategy at the remote end, the current Ic at the fault branch downstream can be approximately expressed as 0. Thus, the voltage and current calculated from the terminal b of the protection installation to the fault branch can be expressed as:

$$U_{b} { = }R_{x} I_{b} + j\omega L_{x} I_{b} { + }R_{g} I_{b} = x\left[ {R_{l} I_{b} + j\omega L_{l} I_{b} } \right] + R_{g} I_{b}$$
(4)

where Rl and Ll are the resistance and inductance per unit length of the line, respectively.

The solution process for the permanent fault is given as:

$$x = \frac{{{\text{Im}} (U_{b} I^{ * }_{b} )}}{{{\text{Im}} \left\{ {I^{ * }_{b} \left( {R_{l} I_{b} + j\omega L_{l} I_{b} } \right)} \right\}}}$$
(5)

where Im represents the imaginary part of the complex number, and I*b is the conjugate of Ib.

The fault distance x is obtained by solving (5), and Ib in (4) can be further expressed as:

$$\left| {I_{b} } \right|{ = }\left| {\frac{{U_{b} }}{{R_{x} { + } + j\omega L_{x} { + }R_{g} }}} \right| > 0$$
(6)

3.1.2 Temporary fault

The equivalent temporary circuit diagram with the RL model in Fig. 7 is further represented in Fig. 8, where Rw and Lw are the equivalent resistance and inductance of the whole length of the line, respectively.

Fig. 8
figure 8

Equivalent temporary circuit with RL model

Since the current Ic at the fault branch downstream can be approximately expressed as 0, the current from terminal b to terminal c can be expressed as:

$$I_{b} = I_{c} \approx 0$$
(7)

Therefore, Eq. (5) can be used to determine the fault distance in the case of a permanent fault, and the amplitude of Ib is greater than 0. In the case of a temporary fault, the amplitude of Ib is equal to 0. In conclusion, the permanent fault can be identified according to the amplitude of Ib, and the fault distance can also be calculated.

3.1.3 Limitations

As the RL model does not consider the influence of line distribution parameters, the fault distance calculated by (4) will have large errors when the line is long. In addition, the effect of capacitive current should be considered. When a permanent fault occurs, a capacitive current occurs owing to the capacitive branch in the line after the fault branch, resulting in errors in (6). Thus, the capacitor branch makes Ib not equal to 0 in the case of a temporary fault, and (7) no longer holds.

Thus, the performance of the RL model is affected by distributed parameter effect and capacitive current. These factors will greatly impact permanent fault identification and location. In conclusion, the effect of distributed parameters and capacitive current should be considered.

3.2 The proposed method

3.2.1 Permanent fault

The proposed method fully considers the influence of the distributed parameter model and the fault branch downstream capacitive current. The equivalent circuit of the proposed method is shown in Fig. 9, where Cl is the capacitance per unit length of the line, Uy is the voltage of the capacitor branch, and C is the equivalent capacitance on the left side of the fault branch.

Fig. 9
figure 9

Equivalent permanent circuit with distributed parameters

Since the distributed parameter model takes into account the transmission line's distribution characteristics as well as the influence of distributed capacitance, the voltage and current calculated from the protection installation's terminal b to the fault branch can be expressed as:

$$\left\{ \begin{gathered} U_{x} = U_{b} \cosh (\gamma x) - I_{b} Z_{c} \sinh (\gamma x) \hfill \\ I_{x} = I_{b} \cosh (\gamma x) - \frac{{U_{b} }}{{Z_{c} }}\sinh (\gamma x) \hfill \\ \end{gathered} \right.$$
(8)

Combined with the fault circuit downstream of the fault branch, Ux and Ix can be further expressed as:

$$\left\{ \begin{gathered} U_{x} = I_{g} R_{{\text{g}}} \hfill \\ I_{x} = I_{g} + I_{c} \hfill \\ \end{gathered} \right.$$
(9)

Since the remote system's fault current is limited to 0, it can be equivalent to an open circuit. Therefore, the fault circuit downstream of the fault branch can be expressed as:

$$\left\{ \begin{gathered} I_{c} = \frac{{U_{x} { - }U_{y} }}{R + j\omega L}{ = }U_{y} j\omega C \hfill \\ R = R_{l} (l - x) \hfill \\ L = L_{l} (l - x) \hfill \\ C = C_{l} (l - x) \hfill \\ \end{gathered} \right.$$
(10)

where l denotes the whole line length.

Combining (8)-(10), the fault circuit equation when there is a permanent fault can be further represented as:

$$U_{x} - R_{g} (I_{x} - \frac{{U_{x} j\omega C_{l} (l - x)}}{{j\omega C_{l} (l - x)[R_{l} (l - x) + j\omega L_{l} (l - x)] + 1}}) = 0$$
(11)

Since (11) contains two unknowns (Rg and x), the equations of the real part and imaginary part can be listed as:

$$\left\{ \begin{gathered} real\left\{ {\left. {U_{x} - R_{g} (I_{x} - \frac{{U_{x} j\omega C_{l} (l - x)}}{{j\omega C_{l} (l - x)[R_{l} (l - x) + j\omega L_{l} (l - x)] + 1}}){ = }0} \right\}} \right. \hfill \\ imag\left\{ {\left. {U_{x} - R_{g} (I_{x} - \frac{{U_{x} j\omega C_{l} (l - x)}}{{j\omega C_{l} (l - x)[R_{l} (l - x) + j\omega L_{l} (l - x)] + 1}}){ = }0} \right\}} \right. \hfill \\ \end{gathered} \right.$$
(12)

The iterative algorithm solves the real and imaginary parts of (12) and can be finished by setting Rg and x to 0.

In the case of a metallic grounding fault, the iterative solution of (12) may have errors, requiring optimization of the initial value of Rg. Therefore, Eq. (12) can be further expressed as:

$$\left\{ \begin{gathered} real\left\{ {\left. {U_{x} - R_{g} { + }0.001(I_{x} - \frac{{U_{x} j\omega C_{l} (l - x)}}{{j\omega C_{l} (l - x)[R_{l} (l - x) + j\omega L_{l} (l - x)] + 1}}){ = }0} \right\}} \right. \hfill \\ imag\left\{ {\left. {U_{x} - R_{g} { + }0.001(I_{x} - \frac{{U_{x} j\omega C_{l} (l - x)}}{{j\omega C_{l} (l - x)[R_{l} (l - x) + j\omega L_{l} (l - x)] + 1}}){ = }0} \right\}} \right. \hfill \\ \end{gathered} \right.$$
(13)

Given that the value of a metallic grounding fault impedance in practical projects is small but not equal to 0 under normal circumstances, optimizing the Rg value in (13) is appropriate.

3.2.2 Temporary fault

Since the fault branch does not exist, the complete voltage and current distribution exist along the line, indicating that voltage and current continuity remains after a temporary ground fault. The voltage and current of the whole line meet the distribution law along the line under the temporary fault. Therefore, the downstream branch after xn is equivalent to the distributed parameter circuit, shown in Fig. 10, where xn (n = 1,2,3…k) refers to the distribution points along the line corresponding to the unit length of the line.

Fig. 10
figure 10

Equivalent temporary circuit with distributed parameters

The corresponding voltage Uxn and current Ixn at xn can be expressed as:

$$\begin{gathered} U_{xn} = U_{b} \cosh (\gamma x_{n} ) - I_{b} Z_{c} \sinh (\gamma x_{n} ) \hfill \\ I_{xn} = I_{b} \cosh (\gamma x_{n} ) - \frac{{U_{b} }}{{Z_{c} }}\sinh (\gamma x_{n} ) \hfill \\ \end{gathered}$$
(14)

From Fig. 10, it can be seen that the following relationships are met between Ixn, Ic1, and Ic:

$$\left\{ \begin{gathered} I_{xn} = I_{c1} + I_{c} \hfill \\ I_{c1} { = }U_{xn} j\omega C_{l} \hfill \\ \end{gathered} \right.$$
(15)

where Ic1 represents the current flowing into xn.

Considering that the remote system can be equivalent to an open circuit because of its fault current being limited to 0, the fault circuit downstream of the fault branch can be expressed as:

$$\left\{ \begin{gathered} I_{c} = \frac{{U_{xk} { - }U_{xn} }}{R + j\omega L} = U_{xk} j\omega C \hfill \\ C = C_{l} (l - x_{n} ) \hfill \\ R = R_{l} (l - x_{n} ) \hfill \\ L = L_{l} (l - x_{n} ) \hfill \\ \end{gathered} \right.$$
(16)

From (14)-(16), the fault circuit equation when there is a temporary fault can be further expressed as:

$$U_{xn} - \frac{1}{{j\omega C_{l} }}(I_{xn} - \frac{{U_{xn} j\omega C_{l} (l - x_{n} )}}{{j\omega C_{l} (l - x_{n} )[R_{l} (l - x_{n} ) + j\omega L_{l} (l - x_{n} )] + 1}}) = 0$$
(17)

It is evident that the fault circuit shows resistance characteristics under permanent fault and capacitance characteristics under temporary fault by comparing (17) and (11). Therefore, the polarity of fault calculation distance when there is a permanent fault is opposite to that when it is temporary. The polarity characteristics for fault distance are further explained below.

To simplify the analysis, the xk point is selected (n = k), and the equivalent circuit diagram is shown in Fig. 11.

Fig. 11
figure 11

Equivalent temporary circuit with distributed parameters (n = k)

As can be seen from Fig. 11, when xk is selected (n = k), Eq. (17) can be further expressed as:

$$I_{xk} { = }U_{xk} j\omega C_{l}$$
(18)

Compared with a permanent fault at the DC line of the remote end, Eq. (11) can be further expressed as:

$$I_{xk} { = }\frac{{U_{xk} }}{{R_{g} }}$$
(19)

By comparing (18) and (19), it is evident that the equivalent circuit shows capacitive characteristics during a temporary fault and resistive characteristics during a permanent fault.

When using (12) to determine the fault distance in the case of a permanent fault, Eq. (19) can be further expressed as:

$$\left\{ \begin{gathered} real\left\{ {\left. {U_{x} { - }R_{g} I_{x} { = }0} \right\}} \right. \hfill \\ imag\left\{ {\left. {U_{x} { - }R_{g} I_{x} { = }0} \right\}} \right. \hfill \\ \end{gathered} \right.$$
(20)

However, when (12) is used to determine the fault distance, Eq. (18) can be further expressed as:

$$\left\{ \begin{gathered} real\left\{ {\left. {U_{x} { - }R^{\prime}_{g} I_{x} { = }0} \right\}} \right. \hfill \\ imag\left\{ {\left. {U_{x} { - }R^{\prime}_{g} I_{x} { = }0} \right\}} \right. \hfill \\ \end{gathered} \right. \Rightarrow \left\{ \begin{gathered} real\left\{ {\left. {U_{x} { - }( - j/\omega C_{l} )I_{x} { = }0} \right\}} \right. \hfill \\ imag\left\{ {\left. {U_{x} { - }( - j/\omega C_{l} )I_{x} { = }0} \right\}} \right. \hfill \\ \end{gathered} \right.$$
(21)

where R'g = -j/ωCl is the equivalent fault impedance.

Therefore, the polarity of fault calculation distance in the case of a permanent fault is opposite to that when the fault is temporary. As a result, in the case of a temporary fault, Eq. (13) indicates negative polarity when used to determine the fault distance.

3.3 Active injection signal strategy

3.3.1 Generation of signal

After a fixed delay, MMC2 injects a specific frequency signal to the line by setting a specific frequency reference value to Udcset. The process is shown in Fig. 12.

Fig. 12
figure 12

Injection signal process

As illustrated in Fig. 12, Udcref and Udcset are the respective references and set values of the DC side voltage, while Vrefpm and Vrefnm are the voltage reference values of the upper and lower bridge arms, respectively. Np and Nn are the sub-modules in the upper and lower bridge arms, respectively. NLM denotes nearest level modulation, um represents the equivalent value of the differential-mode voltage, and Ucn represents the sub-module capacitance voltage.

From Fig. 12, by setting Udcset, the control of the submodules can be realized to inject the signal. The reference value of Udcset is shown as:

$$U_{{{\text{dcset}}}} = 0.1U_{{{\text{dcn}}}} \sin \left[ {\omega (t - t_{1} )} \right] \, t_{1} \le t \le t_{2}$$
(22)

where t1 is the beginning time in the case of signal injection, and t2 is the finishing time. Udcn represents the rated value of the DC voltage.

3.3.2 Amplitude of injection signal

The injection signal amplitude should be large enough to be identifiable to increase the proposed method's performance. The amplitude of the injection signal should consider the measurement unit, the influence of the injection signal on the injection equipment, and the amplitude output capabilities of the converter. The details are:

  1. (a)

    The influence of the measurement unit. In general, the lower limit of the electronic current and voltage transformer is larger than 0.05 p.u. [21]. This is required to guarantee that the amplitude of the injection signal is larger than the lower limit range of the measurement for the injection signal.

  2. (b)

    The influence of the injection signal on the injection equipment. It is necessary to avoid the capacitor voltage exceeding the voltage borne by the IGBT reverse parallel diode in the case of signal injection, shown as:

$$\begin{gathered} U_{{{\text{c\_rms}}}} \le U_{{{\text{VT\_rms}}}} ,U_{{{\text{c\_peak}}}} \le U_{{{\text{VT\_peak}}}} \hfill \\ U_{{{\text{c\_rms}}}} = \sqrt {(U_{{\text{c}}} )^{2} + \sum\nolimits_{h = 1}^{\infty } {(U_{{\text{c}}}^{h} )^{2} /2} } \hfill \\ U_{{{\text{c\_peak}}}} = U_{{\text{c}}} + \max \left| {\Delta U_{{\text{c}}} } \right| \hfill \\ \end{gathered}$$
(23)

where subscripts "c" and "VT" refer to a sub-module capacitor and IGBT reverse parallel diode, respectively. The subscripts "rms" and "peak" represent the effective and peak values, respectively. The superscript "h" represents the harmonic frequency, and Uc represents the DC value of the capacitor voltage of the sub-module. ΔUc indicates the fluctuation of the capacitor voltage of the sub-module compared with the rated value.

In the process of injecting the signal, the amplitude of the injection signal is small, and the influence on the fluctuation of capacitor voltage is limited. The capacitor voltage fluctuation rate can be expressed as:

$$\varepsilon = \frac{{\max \left| {\Delta U_{{\text{c}}} } \right|}}{{U_{{\text{c}}} }}$$
(24)

Considering the cost of capacitors and power devices [22], the reasonable value range is about 0.1 to 0.15 p.u. The converter usually adopts the sub-module voltage balancing control strategy, and the capacitor voltage fluctuation component of its sub-module is much less than 0.15 p.u. It is within the rated range of the sub-module.

  1. (iii)

    The amplitude output capability of the converter. It is essential to assess the capacitor voltage output capabilities of the sub-module owing to the signal injection operation. According to the DC voltage operating range of the hybrid MMC [4], the voltage output range of the signal output by the converter meets the following requirements:

$$M_{{{\text{ac}}}} - \frac{{2N_{f} }}{N} \le U_{{{\text{dcref}}}} \le \frac{{2N_{f} }}{N} - M_{{{\text{ac}}}}$$
(25)

where Mac is AC voltage modulation, N is the total number of converter modules, and Nf is the number of full bridge sub-modules.

When the number of full bridge sub-modules accounts for half of the total sub-modules, the voltage signal output range by the port converter is ± 0.1 p.u. Therefore, it should be ensured that the amplitude of the voltage output by the converter should not exceed 0.1 p.u.

In conclusion, it is recommended that the amplitude of the injection signal should not exceed 0.1 p.u.

3.3.3 Frequency of injection signal

  1. (a)

    The frequency should be lower than the data sampling rate and the control frequency of the converter sub-module [24].

  2. (b)

    The influence of frequency output capacity of the converter. The tracking process error of the converter control influence on the injection signal needs to be considered. The change process of the converter control effect on the injection signal meets the following requirements:

    $$\frac{{{\text{d}}U_{{{\text{dcref}}}} }}{{{\text{d}}t}} \le \frac{{u_{{\text{c}}} }}{{T_{{\text{c}}} }}$$
    (26)

where Tc is the control cycle of MMC.

Taking the AC injection signal as an example, its form can be expressed as:

$$U_{{{\text{dcref}}}} = A{\text{sin2}}\pi f_{{\text{s}}} t$$
(27)

where fs and A are the frequency and amplitude of the given reference value, respectively.

A control cycle when the given reference value waveform changes fastest (steepest) changes a level to ensure the waveform quality of the injection signal. At this time, the frequency of the injection signal is:

$$f_{{\text{s}}} \le \frac{1}{{2{\uppi }ANT_{{\text{c}}} }}{ = }f_{\min }$$
(28)

It can be seen from (28) that it is required to guarantee that the injection signal should be less than fmin to make the output injection signal reflect the given reference value.

  1. (iii)

    It is necessary to consider the attenuation factor of the injection signal in the transmission process. The transmission coefficient of the line can be expressed as:

    $$A_{L} \left( {j\omega } \right){ = }\exp [ - \gamma (j\omega )l]$$
    (29)

The relationship between transmission coefficient amplitude, line length, and frequency is shown in Fig. 13.

Fig. 13
figure 13

Transmission coefficient of line

From Fig. 13, it can be seen that the frequency should not exceed 50 Hz (i.e., in the case of a 500 km length line, the amplitude attenuation exceeds 0.1 p.u).

In conclusion, it is recommended that the frequency of the injection signal can be set to 50 Hz.

3.3.4 Length of the injection signal

  1. (a)

    From the Fourier algorithm, the length of the injection signal should be greater than the data window length of 50 Hz.

  2. (b)

    The injection signal should be assured to have a certain duration and be longer than the open-loop control regulation period to mitigate the effect of the system's open-loop control regulation process. The corresponding open-loop control adjustment time generally can be expressed as [23]:

    $$T_{{\text{d}}} \approx \left( {1 + \frac{1}{{\omega^{2} }}} \right)\frac{{8\omega^{2} L_{{{\text{arm}}}}^{2} C_{{{\text{arm}}}} }}{{NR_{{{\text{arm}}}} }}$$
    (30)

where ω is the frequency of the injection signal, and Carm denotes the capacitance of the bridge arm.

Therefore, the length of the injection signal should be greater than the corresponding length of Td.

  1. (iii)

    Considering that the frequency of the injection signal is 50 Hz, the signal length should be at least an integral multiple of the frequency of the injection signal. A corresponding margin range should be reserved to identify the permanent fault and location reliably. The length of the injection signal is selected as twice the data length of 50 Hz.

Finally, combined with the above analysis, the length is suggested to be 40 ms.

4 The process of the proposed scheme

For the fault identification scheme, the implementation steps are as follows.

  1. 1.

    The fault isolation scheme uses the currents at the protection installations b and a at the capacitor discharge stage to realize fault discrimination by the "zero passing". The details are described below.

The currents at the protection installations b and a will have the "zero passing" characteristic under the T1 area fault scenarios. In contrast, the currents at the protection installations b and a will not have the "zero passing" characteristic under the T2 area fault scenarios. In the case of T3 area faults, the current at one of protection installations b and a has the "zero passing" characteristic.

When the fault occurs on T3, it is determined to be permanent, the DC system blocks the converter, and HSS isolates the fault. When the fault occurs on T1 or T2, it is required to identify the fault properties further. Therefore, it is necessary to distinguish the permanent faults in T1 and T2 for adaptive reclosing.

  1. 2.

    After a 150 ms fixed time delay, the characteristic signal is injected into the line by MMC2. The fault circuit is equivalent to the distributed parameter model, and the fault distance is solved by (13). Ux and Ix denote the electrical quantity of positive or negative pole, which need to be decoupled in (8) as:

    $$\begin{gathered} U_{x(0,1)} = U_{b(0,1)} \cosh (\gamma_{(0,1)} x) - I_{b(0,1)} Z_{c} \sinh (\gamma_{(0,1)} x) \hfill \\ I_{x(0,1)} = I_{b(0,1)} \cosh (\gamma_{(0,1)} x) - \frac{{U_{b(0,1)} }}{{Z_{c} }}\sinh (\gamma_{(0,1)} x) \hfill \\ \end{gathered}$$
    (31)

where the subscripts "1" and "0" denote 1 mode and 0 mode, respectively.

Ux and Ix can be further expressed as:

$$\left[ \begin{gathered} U_{xp} \hfill \\ U_{xn} \hfill \\ \end{gathered} \right] = \frac{\sqrt 2 }{2}\left[ \begin{gathered} 1{ 1} \hfill \\ {1 - 1} \hfill \\ \end{gathered} \right]\left[ \begin{gathered} U_{x1} \hfill \\ U_{x0} \hfill \\ \end{gathered} \right]$$
(32)
$$\left[ \begin{gathered} I_{xp} \hfill \\ I_{xn} \hfill \\ \end{gathered} \right] = \frac{\sqrt 2 }{2}\left[ \begin{gathered} 1{ 1} \hfill \\ {1 - 1} \hfill \\ \end{gathered} \right]\left[ \begin{gathered} I_{x1} \hfill \\ I_{x0} \hfill \\ \end{gathered} \right]$$
(33)

where the subscripts "p" and "n" denote the positive pole and negative pole, respectively.

The Trust Region Reflection (TRR) algorithm is widely used to solve nonlinear equations because it does not depend on the influence of initial value [26]. The calculation process of the TRR algorithm is shown in Fig. 14.

Fig. 14
figure 14

The calculation process of TRR

The TRR algorithm is used to solve (13) to get the fault distance. The initial values of [x, Rg] can be set to [0, 0]. When the fault distance exceeds 0, it is identified as a permanent fault, and the fault distance is the fault location. When the fault distance is less than 0, it is judged as a temporary fault. The process of permanent fault identification is as follows:

$$\begin{gathered} {\text{Permanent fault: }}x > 0 \, \hfill \\ {\text{Temporary fault: }}x < 0 \, \hfill \\ \end{gathered}$$
(34)

According to (34), the proposed method does not need to set the setting values through simulation and ensures the reliability and sensitivity of fault identification in principle.

Given the fault impedance in the case of non-pure resistive characteristics (i.e., the resistance-inductance characteristic [27] or time-varying resistance characteristic [29]), the fault location accuracy may be affected by the non-pure resistance part. However, fault impedance generally presents resistive characteristics [28]. Therefore, the fault impedances in permanent and temporary faults have resistive and capacitive characteristics, respectively, as shown in (17) and (11). The fault location results still have polarity differences, and the fault properties can still be identified theoretically. When the permanent fault is identified, HSS isolates the fault line. When it is judged as a temporary fault, the system restarts.

To sum up, the fault identification scheme flow chart is illustrated in Fig. 15. As seen, the signal can be injected several times to improve the reliability of permanent fault identification. The number of injections is set at 2 in this paper.

Fig. 15
figure 15

Fault identification scheme flow chart

5 Simulation

A bipolar hybrid multi-terminal HVDC system model is developed, as illustrated in Fig. 16a, and the system parameters are shown in Table 2. The frequency-dependent line model is shown in Fig. 16b. The fault occurs at 1 s, and the temporary fault duration is 0.01 s.

Fig. 16
figure 16

The hybrid multi-terminal HVDC system. a Different fault areas. b Frequency-dependent line model

Table 2 Parameters of the hybrid multi-terminal HVDC system

5.1 Performance of fault identification scheme

The pole-to-pole (PTP) fault is the most serious type of DC line fault, so the simulation example takes the PTP fault to test the proposed fault identification scheme. The fault locations are T1, T2, and T3, respectively. The fault locations of T1 are 30 km, 250 km, and 500 km away from the terminal b end (f1-30, f1-250, f1-500), whereas the fault locations of the T2 area are 30 km, 250 km, and 500 km away from terminal a, (f2-30, f2-250, f2-500). The fault properties are temporary and permanent faults. The "zero passing" characteristic of positive pole currents at terminals b and a, and the measurement results of the voltage of terminal b corresponding to the positive pole are shown in Figs. 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28 and 29. The simulation results of the proposed scheme are summarized in Table 3.

Fig. 17
figure 17

f1-30 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 18
figure 18

f1-30 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 19
figure 19

f1-250 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 20
figure 20

f1-250 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 21
figure 21

f1-500 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 22
figure 22

f1-500 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 23
figure 23

f2-30 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 24
figure 24

f2-30 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 25
figure 25

f2-250 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 26
figure 26

f2-250 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 27
figure 27

f2-500 (Permanent fault). a Zero passing characteristics. b DC voltage

Fig. 28
figure 28

f2-500 (Temporary fault). a Zero passing characteristics. b DC voltage

Fig. 29
figure 29

f3 (Permanent fault). a Zero passing characteristics. b DC voltage

Table 3 Simulation results of the proposed scheme

It can be seen from Table 3 that the "zero passing" characteristics can be used to detect the fault area and realize fault isolation rapidly. The proposed fault identification scheme can calculate the accurate fault distance and identify the fault properties.

5.2 Performance of anti-fault impedance

5.2.1 Pure resistive fault impedance

The simulation conditions of the fault identification scheme for performance verification are permanent pole-to-ground (PTG) faults, and the fault impedance is 300 Ω. The fault locations are f1-30, f1-470, f2-30, and f2-470. The "zero passing" characteristic of positive pole currents at terminals b and a, and the measurement results of the voltage of terminal b corresponding to the positive pole are shown in Figs. 30, 31, 32 and 33. The performance of anti-pure-resistive fault impedance is shown in Table 4.

Fig. 30
figure 30

f1-30 (300 Ω). a Zero passing characteristics. b DC voltage

Fig. 31
figure 31

f1-470 (300 Ω). a Zero passing characteristics. b DC voltage

Fig. 32
figure 32

f2-30 (300 Ω). a Zero passing characteristics. b DC voltage

Fig. 33
figure 33

f2-470 (300 Ω). a Zero passing characteristics. b DC voltage

Table 4 Performance of anti-pure-resistive fault impedance

It can be seen from Table 4 that the fault area can be identified at high fault impedance by using the "zero passing" characteristic, which has strong anti-fault impedance performance. The proposed fault identification scheme can effectively identify fault properties and is largely unaffected by fault impedance. Its location accuracy can be generally maintained within a 1% error range.

5.2.2 Time-varying fault impedance

The fault impedance can be affected by wind speed or direction, air humidity, working condition change and other factors, so it may have time-varying characteristics [29]. The fault area is selected as T1, and the fault locations are set as 250 km and 500 km away from terminal b (f1-250, and f1-500) to verify the performance of the proposed scheme in a time-varying fault impedance scenario. The time-varying fault impedance is set as Rf = 180 + 60t Ω (t > tfault, where tfault is the time corresponding to the initial instant of the fault). The "zero passing" characteristic of positive pole currents at terminals b and a, and the measurement results of the voltage of terminal b corresponding to the positive pole are shown in Figs. 34, 35, 36, 37. The performance of anti-time-varying fault impedance is shown in Table 5.

Fig. 34
figure 34

f1-250 (Permanent fault & time-varying fault impedance). a Zero passing characteristics. b DC voltage

Fig. 35
figure 35

f1-250 (Temporary fault & time-varying fault impedance). a Zero passing characteristics. b DC voltage

Fig. 36
figure 36

f1-500 (Permanent fault & time-varying fault impedance). a Zero passing characteristics. b DC voltage

Fig. 37
figure 37

f1-500 (Temporary fault & time-varying fault impedance). a Zero passing characteristics. b DC voltage

Table 5 Performance of anti-time-varying fault impedance

It can be seen from Table 5 that the fault area can be identified at higher fault impedance by using the "zero passing" characteristic, which has a certain anti-time-varying fault impedance performance. Although the proposed method has some location errors due to the influence of time-varying fault impedance, it can effectively distinguish the fault properties and achieve the function of adaptive reclosing.

5.3 Performance of noise interference

Temporary and permanent positive PTG faults are selected for simulation conditions. The noise intensity is 30 dB, and the fault impedance is 300 Ω. The fault locations are f1-10, f1-500, f2-10, and f2-500. The performance of noise interference is shown in Table 6.

Table 6 Performance of noise interference

From Table 6, it can be seen that noise interference only has a small influence on the "zero passing" characteristic. Consequently, the proposed fault identification system can effectively identify faults in the fault isolation stage. The proposed scheme accomplishes permanent fault identification by calculating the fault distance in the adaptive reclosing stage and has strong anti-interference performance.

5.4 Performance of different sampling rates

Temporary PTP faults are chosen for the simulation scenario. The sampling rates are selected as 5 kHz, 15 kHz and 20 kHz, and the fault locations are set as f1-30 and f1-470. The performance at different sampling rates is compared in Table 7.

Table 7 Performance of different sampling rates

Table 7 shows that the proposed method is largely unaffected by the sampling rate since it uses the zero-passing characteristics of the T-shaped area rather than the traveling wavefront characteristics.

5.5 Performance at different DC boundary strengths

Permanent PTP faults are selected for simulation. In combination with the selection of current-limiting reactors (CLR) values in the literature [3, 6,7,8,9], the CLR values at the LCC side are set to 100 mH, 200 mH, and 300 mH, respectively, while the CLR values at the MMC side are set to 10 mH, 50 mH, and 100 mH, respectively. The fault locations are set as f1-30 and f1-470. The performance of different DC boundary strengths is shown in Table 8.

Table 8 Performance of different DC boundary strengths

From Table 8, it can be seen that the proposed method is largely unaffected by different DC boundary values because it uses the zero-passing characteristics of the T-shaped area rather than the DC boundary attenuation effect characteristics.

5.6 Advantages of the proposed scheme

This section compares the performance of the hybrid multi-terminal HVDC transmission system protection methods [3, 6,7,8,9,10,11,12] and adaptive reclosing methods [13,14,15,16,17,18,19,20] with the proposed scheme, as Tables 9 and 10 compare the performance for protection and for adaptive reclosing, respectively.

Table 9 Performance comparison with protection methods
Table 10 Performances comparison with adaptive reclosing methods

As is seen, the proposed method differs from single-end traveling wave protection principles and is less affected by the influence of DC boundary and sampling rate. It uses the current zero-passing characteristics of the T-shaped region in the hybrid multi-terminal DC transmission system to identify the fault area quickly without complex mathematical calculations. The method is different from the traditional pilot principles. It takes advantage of the current zero-passing characteristics in the T-shaped area, and is less affected by the communication and calculation delays at both ends of the DC line.

Compared with the existing injection permanent fault identification methods, the proposed method has the following advantages:

  • The influence of the downstream branch capacitive current of the fault branch is fully considered. Therefore, fault property identification and permanent fault location are realized by solving the fault distance under the distributed parameter model through the TRR algorithm.

  • The proposed method significantly differs in fault distance between temporary and permanent faults, does not need to set the setting values via simulation, and has high sensitivity in fault discrimination. It also has the function of permanent fault location.

  • Unlike traveling wave front identification methods, it is less affected by the sampling rate, fault impedance, DC boundary and other factors.

6 Conclusion

Through theoretical and simulation verification for the proposed fault identification scheme, the following conclusions can be drawn:

  • In the protection stage, the "zero-passing" characteristics of the current at the local end during the capacitor discharge stage are used to quickly identify the fault area without a long communication delay and complex mathematical calculation. It can achieve fault isolation by combining the fault current limiting strategy with HSS.

  • In the adaptive reclosing stage, the proposed method is realized by solving the fault distance under the distributed parameter model through the TRR algorithm. It can sensitively identify the fault properties and has the fault location function. Moreover, it does not need to set the setting values via simulation.

  • The proposed fault identification scheme is suitable for long transmission lines during the whole fault process and has strong anti-fault impedance and anti-interference performance. Furthermore, it is less affected by the DC boundary and sampling rate than existing methods.

Availability of data and materials

The relevant data discussed in this paper can only be considered for sharing if a sincere request is extended to the corresponding author.

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Authors' information

Junjie Hou (1993-), born in Xinjiang, China. He received the Ph.D. degree in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 2022. He is currently a Assistant Professor with the School of Electrical Engineering, Xinjiang University. His research interests include transmission line fault location and protections.

Guobing Song (1972-), born in Henan, China. He received the Ph.D. degree in electrical engineering from Xi’an Jiaotong University, Xi’an, China, in 2005. He is currently a Professor with the School of Electrical Engineering, Xi’an Jiaotong University and the School of Electrical Engineering, Xinjiang University. His research interests include transmission line fault location and protections.

Yanfang Fan (1971-),born in Xinjiang, China. She received the master degree in electrical engineering from Dalian University of Technology, Dalian, China, in 2001. She is currently a Professor with the School of Electrical Engineering, Xinjiang University. Her research interests include power system relay protection technology and renewable energy grid connection technology.

Funding

This work was supported by the Technology Projects of Southern Power Grid Electric Power Research Institute of China (SEPRI-K22B055), National Nature Science Foundation project (2021YFB1507000, 2021YFB1507004), and the Natural Science Foundation of Xinjiang Uygur Autonomous Region (2022D01C662).

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JH, as the first author and corresponding author, contributed significantly to the research, writing, and submission of the paper. GS, as the second author, contributed significantly to analysis and supervised the research of the paper. YF as the third author, contributed significantly to make the paper more comprehensible and grammatically correct. All the authors read and approved the submitted manuscript.

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Correspondence to Junjie Hou.

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Hou, J., Song, G. & Fan, Y. Fault identification scheme for protection and adaptive reclosing in a hybrid multi-terminal HVDC system. Prot Control Mod Power Syst 8, 23 (2023). https://doi.org/10.1186/s41601-023-00297-8

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