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Discrete space vector modulation and optimized switching sequence model predictive control for threelevel voltage source inverters
Protection and Control of Modern Power Systems volumeÂ 8, ArticleÂ number:Â 64 (2023)
Abstract
This paper proposes a discrete space vector modulation and optimized switching sequence model predictive controller for threelevel neutralpointclamped inverters in gridconnected applications. The proposed strategy is based on cascaded model predictive control (MPC) for controlling the grid current while maintaining the capacitor voltage balanced without weighting factor. To enhance the closedloop performance, the external MPC evaluates 19 basic and 138 virtual vectors (VV) of the proposed space vector method. The optimal control voltage is then selected using an extended deadbeat method to reduce the execution time of the proposed control algorithm. By using the discrete space vector modulation principle, the VV are synthesized based on switching sequence (SS) and are divided into negative and positive SSs considering their impact on the neutral point (NP) potential. The inner MPC evaluates both types of SSs and selects the one that keeps the capacitor voltage balanced. Various controllers are evaluated and compared against the proposed control strategy. The results show that the proposed strategy improves performance without weighting factor, while maintaining a total harmonic distortion of current to be less than 2%. Compared to the modulated MPC which provides the same fixed switching frequency, the proposed controller reduces the computational burden by over 50% while also providing better NP voltage balance accuracy.
1 Introduction
Energy shortage and environmental pollution have become critical concerns. This has led to an increased focus on the development of renewable energy sources. As numerous new energy generation systems and flexible AC transmission devices are integrated into the grid, inverters have become an indispensable part of energy conversion systems [1]. In comparison to twolevel inverters, the 3LNPC voltage source inverters boast advantages such as lower output harmonics and reduced semiconductor voltage stress [2, 3]. Consequently, they have been widely adopted in many product lines in renewable energy systems. In addition, the advance of microprocessor technology has enabled the implementation of novel and computationally intensive control algorithms for power electronic topologies and electrical drives, such as predictive control [4]. Such control algorithms often have higher computational requirement than the traditional PItype controllers [5, 6]. Among these control strategies, the most prominent ones include deadbeat, lagbased, trajectorybased and model predictive control.
For classic finite controlset model predictive control (FCSMPC) [7], optimal control actions are obtained by predicting system behavior and evaluating cost functions over all possible states of the converter [8, 9]. FCSMPC offers advantages such as fast dynamic response, simplicity in handling nonlinearity and constraints, and a multivariable control approach [10, 11]. Nevertheless, its main drawbacks include the short sampling time requirement, variable switching frequency and high computation time. These limit its application in multilevel converters [12, 13]. To apply to threelevel inverters, the classic FCSMPC needs to evaluate 27 virtual vectors (VV) in each control cycle, resulting in poor THD performance and significant current ripple [14]. It also entails a high computational workload, posing a challenge for its implementation on DSP/FPGA control hardware. In the case of 3LNPC inverters, MPC employs current and capacitor voltage control objectives for closedloop control, whose performance is influenced by the weighting factors (WFs) [15, 16]. The selected WFs establish the tradeoff between current accuracy and capacitor voltage control, with higher WF values reducing current accuracy and lower values increasing neutral point (NP) voltage imbalance. WF selection often relies on empirical methods, incurring a significant amount of time. Also, classic FCSMPC results in variable switching frequency, which complicates the design of filters [17, 18].
Many researchers have made improvements to the FCSMPC strategy to address the above issues. Regarding the tuning of WFs, references [19] and [20] use fuzzy methods and neural networks to obtain the best WF solution for each operating condition, respectively. In [21], a fast finite switching state MPC without WF is proposed, where the selected voltage vectors are used for tracking the current reference and the redundant vectors for balancing the DC capacitance voltage. However, the method is less effective because of the limited number of states used to control NP voltage.
To address the issue of variable switching frequency in the MPC strategies, a digital filter is employed in [22,23,24] to narrow the switching frequency to a specific range. In [25], an artificial intelligence method is proposed for online tuning of the WFs and regulating the average switching frequency. Reference [26] proposes a modulated MPC (M^{2}PC) strategy to realize capacitor voltage balance by controlling the duty cycle of redundant vectors. However, this method has the drawback of imposing a high computational burden and is of limited applicability. An effective method to resolve the issue of variable switching frequency in MPC strategies is to seek an optimal switching sequence (OSS) instead of a single switching state per control period. In [27], six local OSSs are considered and evaluated in the power control objectives to determine the global OSS for the next sample, whereas in [28], OSSMPC based on two cost functions is proposed to independently control current and capacitor voltages without WF. However, this method needs to compute the solution of the relaxation problem first, followed by the use of nonnegative constraints to solve the OSS, resulting in a high computational burden. Li et al. [29] introduces the use of a cost function to define the region with the OSS candidates for evaluation, thereby reducing the computational burden. However, the execution time is still quite high because of the need to calculate the duty cycle corresponding to the OSS. To further reduce the execution time, the deadbeat control technique is proposed to select the required control voltage without evaluation of the voltage control objective [30, 31]. In [32], deadbeatpredictive torque control with discrete spacevector modulation is proposed to reduce the torque ripple and the computational burden of the conventional predictive torque control method. Nevertheless, a control method that can achieve high control precision while simultaneously addressing the challenges related to the absence of WF, fixed switching frequency, and low computational burden still requires further research and development.
In this paper, a discrete space vector modulation and optimized switching sequence model predictive controller (DSVMOSSMPC) strategy is proposed. The main contributions of this paper include the following three aspects:

(1)
Controlling grid current based on the cascade MPC while maintaining capacitor voltage balance without WF, thus eliminating the cost of WF selection.

(2)
Achieving superior current tracking accuracy and NP voltage balance. To improve the closedloop performance, DSVM is used to achieve a new space vector with 157 voltage vectors instead of the 19 basic vectors used in classic MPC. The additional 138 vectors are virtual and synthesized using the OSS which considers the impact of each vector on NP voltage and the reduction of switching commutation.

(3)
Significantly reduced computational burden is achieved. To avoid the exhaustive search for the optimal control solution among the 157 SS candidates, the extended deadbeat method is used in the outer MPC to reduce the closedloop control to a suboptimal problem. The inner MPC then focuses on the redundant SSs to select the optimal solution. Therefore, the proposed control strategy offers the benefit of delivering accurate current response and maintaining capacitor voltage balance, while simultaneously exhibiting characteristics of no WF influence and reduced computational burden.
The rest of this paper is organized as follows: the classic MPC method is presented in Sect. 2, while Sect. 3 introduces the basic principles of switching sequence MPC. Section 4 provides a detailed description of the proposed DSVMOSSMPC, including the extension of the space vector based on the DSVM and OSS, the selection method of the optimum voltage vector, and the optimization of the capacitor voltage balance. In Sect. 5, experiments and simulations are carried out to verify the effectiveness and superiority of DSVMOSSMPC. The conclusions are given in Sect. 6.
2 Classic FCSMPC strategy for 3LNPC
Figure 1 presents a 3LNPC inverter connected to the grid. The DCside of the converter consists of two capacitors supplied by a DC voltage v_{dc}. At the ACside, the converter is connected to the threephase sources (e_{a}, e_{b}, e_{c}) through the RL filter and injects threephase currents (i_{a}, i_{b}, i_{c}) to the grid. Each phase of the threelevel NPC consists of four switches S_{xi} with \(x \in \{ a,b,c\}\) and \({1} \le {\text{ i }} \le {4}\), and generates up to three switching levels \(S_{x} \in \left\{ {  {1, 0, 1}} \right\}.\) Considering the three legs, the inverter can generate 27 switching states S_{jabc}.
with \(1 \le j \le 27\). To obtain the optimal state for the next sample with the MPC, the dynamic response of the system due to each switching state candidate S_{jabc} is predicted and evaluated.
From the modeling approach described in [33] and considering the variables given in Table 1, the grid currents, and the sum and difference in the dynamics of the DClink voltage in the Î±Î²Î³ reference frame can be expressed as:
where x_{1}â€‰=â€‰v_{C1}â€‰+â€‰v_{C2} and x_{2}â€‰=â€‰v_{C1}â€”v_{C2} are the sum and the difference of the upper and lower DClink voltages, respectively.
To ensure correct converter operation, x_{2} must be near zero or at least one order of magnitude lower than x_{1} [33]. In addition, the averaged duty cycle S_{Î±Î²} is defined within [â€‰âˆ’â€‰1, 1], and therefore the third term located on the righthand side of (1) can be assumed to be two orders of magnitude lower than the second term. With this consideration, the inductor current dynamics can be approximated by:
where \({\text{u}} = \frac{1}{{2}}\) x_{1}S_{Î±Î²} is the output voltage vector of the inverter, i_{Î±Î²} is the output current vector, and e_{Î±Î²} is the grid voltage vector. From [34], the current predictions at kâ€‰+â€‰1 in the \(\alpha \) axis and \(\beta \) axis which are noted as \(i_{\alpha }^{p} (k + 1)\) and \(i_{\beta }^{p} (k + 1)\), are given by:
where \({\text{i}}({\text{k}})\) is the measured current at the k sample, while \({\text{e}}({\text{k}})\) and \({\text{u}}({\text{k}})\) are the measured grid voltage and inverter output voltage at the k sample, respectively.
For NP voltage balance, the capacitor voltages v_{c1}(kâ€‰+â€‰1) and v_{c2}(kâ€‰+â€‰1) related to the capacitors C_{1} and C_{2} at the kâ€‰+â€‰1 sample are predicted as:
where v_{c1}(k) and v_{c2}(k) are the measured capacitor voltages at the k sample. i_{c1}(k) and i_{c2}(k) are the currents flowing through the capacitors at the k sample and are given by:
where \({\text{H}}_{{1}{\text{x}}}\text{=}\left\{\begin{array}{c}1, \text{if }{\text{S}}_{\text{x}}={1}\\ 0, \text{otherwise}\end{array}\right.\), and \({\text{H}}_{{2}{\text{x}}} = \left\{\begin{array}{c}1, \text{if }{\text{S}}_{{\rm x}} = 1\\ 0, \text{otherwise}\end{array}\right.\).
The standard cost function for tracking the current reference and regulating the capacitor voltage balance is defined in [35], given by:
where \(i_{\alpha }^{*} (k + 1)\) and \(i_{\beta }^{*} (k + 1)\) are the current reference components at instant kâ€‰+â€‰1, and Î»_{dc} is the WF. For time delay compensation [36], the evaluation of (8), (6), and (5) is considered at kâ€‰+â€‰2 rather than kâ€‰+â€‰1.
To obtain good performance when using (8), an appropriate tradeoff needs to be achieved between tracking current and balancing capacitor voltage. Since Î»_{dc} is a function of the operating point and a parameter of the system, the design of Î»_{dc} is not trivial [15]. In addition, the unified cost function which provides a single optimal solution does not guarantee that both individual control objectives are optimized [37]. An alternative method to simultaneously track the current and control the capacitor voltages without the need for WF is to use a cascaded MPC approach [15, 37].
3 Basic principle of the SSMPC
The cascaded SSMPC approach is proposed in [28] for controlling the grid current and the capacitor voltages of the threelevel inverter without the use of WF, as shown in Fig. 2. The outer MPC determines the suboptimal SS candidates which satisfy the current objective, whereas the inner MPC selects between the suboptimal candidates, with the SS ensuring capacitor voltage balance.
Maintaining the capacitor voltages to be balanced requires the control of the NP voltage \({\text{O}}\), which is defined as v_{o}â€‰=â€‰v_{c2}v_{c1}. Considering that the system is balanced and the DClink voltage is constant, the dynamic of v_{o} is given by:
The NP current i_{o} is obtained by:
where \(\left{\text{S}}_{\text{jabc}}\right\text{=}{\left[\left{\text{S}}_{\text{ja}}\right \, \left{\text{S}}_{\text{jb}}\right \, \left{\text{S}}_{\text{jc}}\right\right]}^{\text{T}}\), and \({\text{i}}_{{\rm abc}} = {\left[{\text{i}}_{{\rm a}}, {\text{i}}_{{\rm b}}, {\text{i}}_{{\rm c}}\right]}^{{\rm T}}\).
From Fig. 3, the analysis of the 27 switching state candidates of the threelevel NPC is divided into four categories of vectors: zero using black dots; small using red dots; medium using blue dots; and larger using green dots. Except for the zerovoltage vectors, only the small vectors can connect the inverter terminals to the same type of DClink potential. A switching state S_{jabc} is called Ptype and noted as S_{abc.P} when only the positive terminal of the DC link is connected to the grid, and Ntype S_{abc.N} when connected to the negative terminal. The classification of small vectors according to the type of switching states S_{abc.P} and S_{abc.N} is given in Table 2. Using (10), the direction of NP current can be defined.
For example, by applying the Ptype [O,P,O]^{T} and its associated Ntype redundancy [N,O,N]^{T}, the associated NP current according to (10) are i_{o}â€‰=â€‰i_{b} and i_{o}â€‰=â€‰i_{b}, respectively. With an appropriate distribution of several switching combinations within the sampling period, it is possible to control the current as well as NP voltage potential.
The order of the converter applying several S_{jabc} within the control period is known as SS and the controller is called SSMPC. In PWM and SVM modulation methods, various SS dispositions are reported in the literature. Since SVM is synthesized based on the space vector, it is easier to implement SSMPC based on SVM than PWM, and it provides a simpler identification of small voltage vectors to control the NP voltage.
To synthesize SVM, the space vector presented in Fig. 3 is divided into six sectors, and each sector is further divided into four regions or subsectors. For a 3LNPC, the total number of regions is 24 and each region has three switching states with one or two small vectors. For instance, region II within sector 1, noted as 1II, has one medium and two small vectors. Considering SVM based on a symmetric pulse pattern, an SS applied over a control period is given by:
where u_{i} (iâ€‰=â€‰1, 2, 3) is the vector related to the i^{th} switching state of a subset. t_{i} (iâ€‰=â€‰1, 2, 3) is the duration of the i^{th} switching state in a subsection and satisfies the following formula:
Focusing on halfsampling time, several dispositions of SS are possible using the vectors \({\text{u}}_{1}\), \({\text{u}}_{2}\), and \({\text{u}}_{3}\). The total number of possible dispositions of switching states in an SS per region increases with the number of redundant vectors. To regroup the SS in each region into two types, the nature of an SS is exclusively defined by the type of its small vectors. For example, in region 1IV, if a Ptype small vector [PPO] is used, the number of possible dispositions of Ptype SS are [PONPPNPPO], [PONPPOPPN] [PPOPPNPON], [PPOPONPPN], [PPNPPOPON] and [PPNPONPPO]. In this work, to reduce the switching losses within a control period, the switching effort is restricted. In the first restriction, the switching state per phase (S_{x}) cannot change between P and N and viceversa. In the second restriction, only one phase of an applied threephase switching state (S_{abc}) can change. In such a case, the candidate SSs in subsector 1IV are PONPPNPPO for the Ptype and PPNPONOON for the Ntype. The same principle is used for all the SSs of sector 1 as given in Table 3.
However, the type of the optimal SS, which is applied between two consecutive samples and selected by the inner MPC, can change between the Ptype and Ntype. For example, considering the previously applied SS of 1IIP, the next optimal candidate SS selected by the inner MPC is either 1IIP or 1IIN if the required control voltage is in sector 1II. Between two consecutive samples, two phases of the inverter can change. In this scenario, the second restriction is not respected, which will lead to an extra switching effort.
To synthesize the applicable OSS during each sample, the conduction time associated with each switching state within a control period has to be calculated. Various online methods are proposed for obtaining the OSS and the related duty cycle as a function of the resulting current and power errors of the primary term of the cost function [26,27,28,29]. Even though they provide an optimal duration candidate for tracking the control objectives, these methods result in a higher computational burden.
4 Proposed DSVMOSSMPC strategy
An offline approach provides an alternative solution to tune the SS candidates without increasing the computational burden of the MPC algorithm. In this paper, DSVM based on virtual vectors is used to synthesize the OSS without the need for the online evaluation of the related switching durations.
4.1 DSVM based on virtual vectors
To improve controller performance, the number of virtual vectors is selected so that the closedloop performance is similar to the one achieved under MPCPWM [38]. The virtual vector noted u_{v} is synthesized by its corresponding SSs as given by:
where u_{i} is the basic vector and u_{v} is the virtual vector. d_{i} is the duty cycle of vector u_{i} calculated as d_{i}â€‰=â€‰t_{i} / T_{s}. By substituting the coordinates of the three basic and virtual vectors in (13), Eqs. (13) and (14) are developed into a system of three equations. The resulting system is solved offline for obtaining the d_{i} associated with each u_{i}.
To expand the number of voltage vectors of sector 1II from 3 vectors to 6, 10, 19, and 28, the region is further divided as presented in Fig. 4. In [36], the expanded region consists of three actual and three virtual vectors, as shown in Fig. 4a. To select the appropriate extended configuration, the current THD, the average switching frequency (ASF), and the complexity of implementing MPC when n_{v} increases are considered. To select the suitable expanded region, the MPC with 6, 10, 19, 28 vectors per region are compared with MPCPWM, as shown in Fig. 5. As seen, when n_{v}â€‰=â€‰6, the resulting ASF is lower than that of MPCPWM, and for a closedloop control with the lowest ASF and complexity, the suitable configuration is n_{v}â€‰=â€‰6. However, the resulting current THD is higher than that under MPCPWM for the different operating currents.
To achieve a similar current THD as under MPCPWM, the switching frequency needs to be increased. However, this can be challenging to implement in a lowcost digital processor because of the high computational requirement. For n_{v}â€‰=â€‰10, 19, and 28, the resulting current THD and ASF are similar to the values under MPCPWM. Thus, to obtain performances that are equivalent to the ones achieved under MPCPWM, the possible candidates are n_{v}â€‰=â€‰10, 19, and 28. Considering that for n_{v}â€‰âˆˆâ€‰{10, 19, 28}, the improvement of the current THD and the reduction of the ASF are negligible, MPCDSVM with n_{v}â€‰=â€‰10 represents the scenario for achieving a similar closed response to that of MPCPWM, without imposing excessive implementation complexity.
Considering the case with n_{v}â€‰=â€‰10, the expanded space vector is presented in Fig. 6a. Focusing the analysis on the subsector 1II for instance, the number of virtual vectors synthesized based on three basic vectors is equal to seven as presented in Fig. 6b, and each virtual vector is synthesized according to Table 4. Knowing that a subsector has two types of SS (as seen in Table 3), each virtual vector u_{v} can be decomposed into Ptype and Ntype SSs as illustrated in Fig. 7. Hence, the expanded space vector presented in Fig. 6a has a total of 157 vectors divided into 19 basic vectors and 138 virtual vectors. Since the total number of candidate vectors is 6 times the number of states generated by 3LNPC, it is anticipated that the computation time will be excessive when using the classic optimization approach. To implement a control algorithm with a reduced computational burden, it is crucial to reduce the optimization problem to evaluate only the SS candidates which satisfy the optimal control voltage.
4.2 Outer and inner MPCs
To obtain the OSS control action for the next sample, the cost function given in (8) is developed as a function of voltage control objectives. Using the unified optimization method, the cost function is given by:
where \(u_{\alpha \beta }^{*} (k)\) is the reference voltage components, and v_{o} is the NP voltage potential given by:
Using the cascaded MPC method, the first primary term of (15) is used by the outer MPC as given by:
The evaluation of (18) requires 157 cycles of calculation which is difficult to achieve, especially with standard digital control processors. To obtain the optimal vector with the lowest computational requirement, an extended deadbeat method is developed. The main idea is to define the boundaries associated with each candidate voltage vector in the expanded space vector, and use the coordinates of the reference to identify the region which is associated with the optimal control action.
Considering sector 1 in Fig. 6a, the vectors are projected in the reference formed by the three axes L_{1}, L_{2}, and L_{3} as illustrated in Fig. 8. As seen, L_{1} is parallel to the axis noted as [ONNPPN], L_{2} is parallel to the axis noted as [OOOPON], and L_{3} is parallel to the axis noted as [PNNPPO]. It can also be seen from Fig. 8 that each virtual vector is the center of a smaller hexagon, i.e., the region defined by each small hexagon corresponds to a given optimal voltage vector. Assuming that the reference voltage vector is u* as represented by the light blue vector in Fig. 8, the virtual vector u_{v} which is the center of the light blue hexagon is the optimal control voltage.
In general, the coordinates of the reference vector are given by:
In the case where the reference vector u^{*} exceeds the maximum modulation range, u^{*} is scaled back into the converter operating region as illustrated by the green vector in Fig. 8 and is given by:
where \(\left{\text{u}}_{\text{max}}\right\) is the module of the maximum voltage vector.
With the coordinates of the reference voltage, two steps are needed to determine the optimal control voltage. The first step is to localize the smaller sector and the second is to find the corresponding smaller hexagon. For the first step, each small sector is defined by the boundary conditions in three axes. For example, the voltage reference is within the small sector 1II, if L_{1}â€‰â‰¤â€‰6, L_{2}â€‰â‰¥â€‰6, and L_{3}â€‰â‰¥â€‰6. The second step is to determine the small hexagon with the small vector adjacent to the vector reference. It should be noted that two dispositions of small sectors are possible in a sector, and the distribution of virtual vectors depends on the type of disposition as presented in Fig. 9. The error, \(\Delta L\), between the reference voltage and the center of a given small sector is defined by:
where L_{1}(u^{*}), L_{2}(u^{*}), and L_{3} (u^{*}) are the coordinates of u^{*} on L_{1}, L_{2}, and L_{3}, respectively. L_{1}(u_{center}), L_{2}(u_{center}), and L_{3}(u_{center}) are the coordinates of u_{center} on L_{1}, L_{2}, and L_{3} respectively. When the reference voltage is adjacent to an actual vector, u_{x}, u_{y} or u_{z}, the new center used to evaluate (23) is associated with a small sector and is given by u_{center}â€‰=â€‰(u_{x}â€‰+â€‰u_{y}â€‰+â€‰u_{z})/3. In summary, the rules for selecting the optimal control voltage are given in Table 5.
Taking u* represented in Fig. 8 as an example, with the coordinates L_{1}â€‰=â€‰3.6, L_{2}â€‰=â€‰7.3, and L_{3}â€‰=â€‰âˆ’ 4.5, u* belongs to sector 1âˆ’ II which is an Atype disposition. The adjacent center to the reference control voltage is obtained by rounding up u* and the resulting coordinates are (4, 8, 4). With the coordinates of u* and u_{center}, \(\Delta L\) is (0.4, 0.7, 0.5). From Table 5, the optimal voltage vector is u_{v4}, which is synthesized by applying u_{x}, u_{y}, and u_{z} during the duty cycles 1/3, 1/3, and 1/3, respectively.
The optimal voltage control provided by the outer MPC is used by the inner controller for the NP voltage balance. The cost function of the inner loop is defined as:
The optimal vector can be either a basic or virtual vector, and so is selected from the 157 vectors. In the case where it is a virtual vector, the inner MPC selects the type of SS that ensures a better NP voltage balance. The proposed DSVMOSSMPC uses the whole extended space vector with 157 compared to 19 for the classic MPC, and therefore a better current accuracy can be achieved.
The block diagram of the proposed strategy is shown in Fig. 10 and the algorithm is described by the following main steps.

(1)
Measure i_{Î±Î²}(k), e_{Î±Î²}(k), v_{c1}(k) and v_{c2}(k).

(2)
Apply the optimal switching sequence.

(3)
Predict i_{Î±Î²}(kâ€‰+â€‰1), e_{Î±Î²}(kâ€‰+â€‰1), \(i_{\alpha \beta }^{*}\)(kâ€‰+â€‰2), and \(u_{\alpha \beta }^{*}\)(kâ€‰+â€‰2).

(4)
Calculate L_{1}, L_{2,} and L_{3} associated to \(u_{\alpha \beta }^{*}\)(kâ€‰+â€‰2).

(5)
Use the coordinates of \(u_{\alpha \beta }^{*}\)(kâ€‰+â€‰2) to select u_{Î±Î²}(kâ€‰+â€‰2).

(6)
Select N or Ptype SS which minimizes g_{inner}.
5 Simulation and experimental results
For validation purposes, the effectiveness of the proposed controller is compared with the classic MPC [33], the FSMPC without WF (WMPC) [21], and the M^{2}PC [26]. The parameters of the system used for the evaluation are given in Table 6 and the controller operating sampling frequency is 10 kHz.
5.1 Simulation results and discussion
The comparative evaluation of the four control strategies with a current step change from 15 to 30A is presented in Figs. 11, 12. As seen from Fig. 11 M^{2}PC provides the fastest response with a time response t_{s(c)}â€‰=â€‰0.72 ms, i.e. faster than t_{s(d)}â€‰=â€‰0.83 ms with the proposed controller. However, compared to the respective response times of t_{s(a)}â€‰=â€‰1.57 ms and t_{s(b)}â€‰=â€‰1.64 ms with MPC and WMPC, the proposed DSVMOSSMPC presents a faster dynamic response.
From Fig. 12, with both 15 A and 30 A operating currents, the NP voltage with classic MPC and WMPC is higher with a value equal v_{o(a)}â€‰=â€‰9.2 V and v_{o(b)}â€‰=â€‰8.2 V, respectively. While the proposed strategy and M^{2}PC ensure a better balanced capacitor voltage with the peak NP voltages of v_{o(c)}â€‰=â€‰5.3 V and v_{o(d)}â€‰=â€‰5.2 V, respectively.
To provide a fair comparison on the steadystate performances of different control methods, the four controllers are operated at the same ASF. The ASF of a 3LNPC inverter is defined as
where ASF_{ni} denotes the switching times of the ith IGBT of nphase in one second.
The comparative evaluation of the four control strategies is made with a similar resulting ASF (2 kHz) and the results are presented in Figs. 13 and 14, where the sampling frequencies of the classic MPC, WMPC, M^{2}PC and DSVMOSSMPC are 15 kHz, 15 kHz, 6 kHz, and 6 kHz, respectively. It can be noted that the four control strategies provide similar output current THD when operating at a similar average switching frequency. The current THD with classic MPC, WMPC, M^{2}PC and DSVMOSSMPC are THD_{(a)}â€‰=â€‰2.15%, THD_{(b)}â€‰=â€‰2.16%, THD_{(c)}â€‰=â€‰2.32%, and THD_{(d)}â€‰=â€‰2.31%, respectively. However, compared to MPC and WMPC, both the proposed controller and M^{2}PC strategies operate at a fixed switching frequency of 6 kHz.
5.2 Experimental results and validation
The simplified diagram and a picture of the experimental setup are presented in Fig. 15. The converter parameters and the grid voltage are given in Table 6. The different control algorithms are implemented in a realtime platform and further details can be found in [34].
The comparative evaluation of the four control strategies at the same sampling frequency (fsâ€‰=â€‰10 kHz) is shown in Fig. 16, where the ASF of the classic MPC, WMPC, M^{2}PC and DSVMOSSMPC are 1.712 kHz, 1.704 kHz, 4.330 kHz, and 3.815 kHz, respectively. The operating average switching frequencies with M^{2}PC and the proposed method are over twice those with the classic MPC and WMPC. These results show that the current THD with MPC, WMPC, M^{2}PC and DSVMOSSMPC are THD_{(a)}â€‰=â€‰4.40%, THD_{(b)}â€‰=â€‰4.46%, THD_{(c)}â€‰=â€‰1.53%, and THD_{(d)}â€‰=â€‰1.57%, respectively. Compared with classic MPC and WMPC, the proposed control strategy provides a lower current THD. With the classic MPC and WMPC, the converter operates at a variable switching frequency with the average value lower than 5 kHz while both M^{2}PC and DSVMOSSMPC are operating at a fixed switching frequency of 10 kHz.
The comparative evaluation of the four control strategies at a similar average switching frequency (ASFâ€‰=â€‰3 kHz) is shown in Fig. 17, where the operating sampling frequency of the classic MPC, WMPC, M^{2}PC, and DSVMOSSMPC are 18 kHz, 18 kHz, 7 kHz, and 8 kHz, respectively. The four control strategies show similar current THD, i.e., THD_{(a)}â€‰=â€‰2.43%, THD_{(b)}â€‰=â€‰2.50%, THD_{(c)}â€‰=â€‰2.76%, and THD_{(d)}â€‰=â€‰2.71%, respectively. With MPC and WMPC, the converter operates at a variable switching frequency while M^{2}PC and DSVMOSSMPC operate at a fixed switching frequency of 7 kHz and 8 kHz, respectively. To achieve a similar current THD as with M^{2}PC or DSVMOSSMPC, the sampling frequency of MPC and WMPC has to be increased, which is challenging to implement in lowcost digital processors.
The above results are further summarized in Fig. 18. The proposed controller results in a low current THD similar to the value under M^{2}PC. However, the operating average switching frequencies with M^{2}PC and the proposed method are almost twice those with the classic MPC and WMPC. When the resulting switching frequency is approximately the same with the four controllers as shown in Fig. 19, the proposed approach operating at 8 kHz sampling frequency results in slightly higher current THD than the values with MPC and WMPC since those are operating at 18 kHz sampling frequency. However, implementing MPC and WMPC at such a high sampling frequency can be challenging because of the computational requirement. Therefore, the proposed DSVMOSSMPC which has the lowest computation time is a suitable solution to improve closedloop performance in a scenario where a lowcost digital processor is used.
The dynamic responses of the current and capacitor voltages are shown in Fig. 20. As seen, the DC bus voltages remain balanced when the reference current is changed from 3 to 6 A. Compared with the classic MPC and WMPC, M^{2}PC and the proposed control strategy have faster response time.
To extract the computation times of the four control methods, each control algorithm is implemented in the TMS320F28379 DSP, and the digital output is set to a high voltage level when the algorithm is running and reset to a low voltage level when the processing is completed. The computation time required by each controller is presented in Fig. 21. As can be seen, the proposed strategy requires the lowest computational time of 23.26 Î¼s, compared to 53.62 Î¼s for M^{2}PC, which provides almost the same closedloop performance for the same operating switching frequency.
The comparative study of the four control methods is summarized in Table 7. Compared with the classic MPC and WMPC, the proposed method significantly improves the accuracy of the current tracking, and the current harmonics are mainly concentrated on the fixed frequency. Compared to the M^{2}PC method, the proposed control strategy achieves similar control accuracy and THD performance. It's worth highlighting that the computation time of the proposed strategy is significantly shorter than the other methods, leading to a substantial reduction in computational burden. In addition, the proposed strategy limits the capacitor voltage imbalance to be less than 1%.
6 Conclusion
In this paper, a DSVMOSSMPC strategy operating with a fixed switching frequency is investigated for the control of a 3LNPC inverter. The strategy is based on a cascaded MPC approach for controlling the grid current and balancing the capacitor voltages without any WF. To improve control precision, an optimal voltage is selected from the basic and virtual vectors of the proposed extended space vector method. In the proposed algorithm, the outer MPC employs an extended deadbeat method to output the optimal control voltage, reducing the execution time of the proposed control algorithm. The inner MPC evaluates the optimal vector and its potential redundancy, and selects the vector that minimizes the NP voltage. Additionally, each virtual vector is creatively synthesized as an OSS by using the DSVM and considering its impact on the NP voltage and the inverter switching commutations. The simulation and experimental results indicate that compared to the classic MPC and WMPC control algorithms, the closedloop performance of the proposed algorithm is improved, and the current THD is maintained below 2%. The computational burden of the proposed strategy is reduced by over 50% compared to M^{2}PC with similar closedloop performance, making it the most efficient option among all the compared methods.
It is evident that the proposed strategy offers the benefits of precise current response, capacitor voltage balance, absence of WF influence, and low computational burden. These characteristics render it suitable for application in 3LNPC inverters. In future work, we will further explore and optimize this strategy in practical engineering applications while researching potential extension and enhancement to address the evolving challenges in gridconnected renewable energy generation.
Availability of data and materials
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Abbreviations
 3LNPC:

Threelevel neutralpointclamped inverter
 MPC:

Model predictive control
 VV:

Virtual vectors
 DSVM:

Discrete space vector modulation
 SS:

Switching sequence
 NP:

Neutral point
 THD:

Total harmonic distortion
 M^{2}PC:

Modulated MPC
 OSS:

Optimal switching sequence
 FCSMPC:

Finite controlset model predictive control
 WF:

Weighting factor
 DSVMOSSMPC:

Discrete space vector modulation and optimized switching sequence model predictive controller
 ASF:

Average switching frequency
 WMPC:

The FSMPC without WF
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This work was supported by the Chinese National Natural Science Foundation (grant number 51977039) and The central government guiding local science and technology development project under Grant 2021L3005.
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All authors contributed to the study conception and commented on previous versions of the manuscript. Sheng Zhou is the main contributor of the revised paper and completed the design, simulation, data analysis, and validation of the proposed method in the revised paper. Minlong Zhu completed the design and simulation of train working conditions in the origin submitted paper. Jiaqi Lin helped the hardware experiments, data collection, and modifying of the revised paper. Paul Gistain IpoumNgome was mainly responsible for the selection of circuit parameters in the hardware design and put forward modification suggestions for the language of the paper. Daniel Legrand MonNzongo guided the direction of the paper and put forward modification suggestions. Prof. Tao Jin proposed the idea and designed the methodology of this paper, and guided the direction of the paper. All authors read and approved the final manuscript.
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Zhou, S., Zhu, M., Lin, J. et al. Discrete space vector modulation and optimized switching sequence model predictive control for threelevel voltage source inverters. Prot Control Mod Power Syst 8, 64 (2023). https://doi.org/10.1186/s41601023003373
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DOI: https://doi.org/10.1186/s41601023003373