Table 5 Performance of the devices in test scenario 1
Oscillation center position | On/off strategies of series compensation capacitor | Device performances (action or not) | Results | |||
|---|---|---|---|---|---|---|
D1 | D2 | D3 | D4 | |||
BUS2–BUS3 | All entry | Y | Y | N | Y | Correct |
C1–C3 Exit | Y | Y | N | Y | Correct | |
C4, C5 Exit | Y | Y | N | N | Correct | |
All exit | Y | Y | N | N | Correct | |
Near BUS3 | All entry | Y | Y | Y | Y | Correct |
C1–C3 exit | Y | Y | Y | Y | Correct | |
C4, C5 exit | Y | Y | Y | Y | Correct | |
All exit | Y | Y | Y | Y | Correct | |
BUS3–BUS4 | All entry | Y | N | Y | Y | Correct |
C1–C3 exit | N | N | Y | Y | Correct | |
C4, C5 exit | Y | N | Y | Y | Correct | |
All exit | N | N | Y | Y | Correct | |