Fig. 17

Experimental results under a 0.15 pu DC offset. CH1, CH2, and CH3 show the responses of the proposed PLL, mEPLL, and modified SOGI-PLL, respectively. a Estimated phase error and b estimated grid frequency
Experimental results under a 0.15 pu DC offset. CH1, CH2, and CH3 show the responses of the proposed PLL, mEPLL, and modified SOGI-PLL, respectively. a Estimated phase error and b estimated grid frequency